April 29, 2008 -- eASIC Corp., a provider of zero-mask charge ASIC devices, today announced a $30,000 placement design challenge. This challenge is designed to inspire innovation in the area of placement algorithms. eASIC will offer a total prize of $30,000 to the individuals or groups that can implement the most efficient placement algorithms.

Eligible design challenge contestants can submit proposals either as teams or as individuals. To facilitate this design challenge, eASIC will provide design examples, utilities for evaluation, and representations of its unique architecture.

"We have completed many designs to date and believe that the design tools and methodologies used exploit the uniqueness of our silicon," said Dr. Herman Schmit, Vice President of Technology at eASIC. "But when you are in the business of disruption and innovation, one must keep an open mind and strive to avoid the pitfall of incremental improvements as we have seen with FPGA design tools. The design challenge will hopefully excite the open community and will foster radical new ideas and methodologies."

Dr. Schmit continued, "This design challenge reflects eASIC’s commitment to building an innovative software organization--one that combines collaborative world-wide research and the open source community. Just like our silicon technology, which is enabling everyone to get their ideas to production silicon, the design of our future software will enable innovative EDA engineers to participate in the creation of a uniquely powerful software system."

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