September 11, 2008 -- Verific Design Automation, Inc today said that DAFCA, Inc. has expanded its use of its front-end software to include support for SystemVerilog.
A Verific user since 2003, DAFCA has integrated Verific’s software into its validation software that enables rapid system-on-chip (SOC) validation and debug. Verific’s SystemVerilog, Verilog and VHDL software suite of parsers, analyzers, elaborators, and netlist oriented database, serves as DAFCA’s ClearBlue front-end for exploring, navigating, analyzing, documenting and modifying designs. All are written in platform-independent C++ that compiles on Solaris, HP-UX, Linux and Windows platforms. Each is licensed as source code and comes with support and maintenance.
