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Assertion Based Verification, ESL to Gate  
Company: JEDA Technologies, Inc.
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The demand for smaller and faster integrated systems has resulted in the proliferation of solutions involving system-on-chip(SOC) designs. Companies typically use SOC’s in a range of products such as consumer electronic, medical, telecommunication, computing etc. devices. Due to the nature of SOC designs, consisting of both hardware and software components, System designers adopt Electronic System Level(ESL) based design and verification methodologies using SystemC.

Companies spend considerable resources and effort to produce SOC based products. In addition, short time-to-market product cycles add pressures on these companies to have first working Silicon in record time. One of the most effective techniques companies have employed to quickly identify and fix problems in their Silicon implementation stage is the Assertion Based Verification(ABV) metodology. Unfortunately, System designers have not benefited from ABV because there hasn’t been a product to provide such capability until now.

In this short write-up we present Native SystemC Assertion(NSCa), the industry’s first Native SystemC based Assertion product that helps identify and fix design issues early in the design phase. The product further provides the ability to write System level assertions that are fully re-usable at both the RTL and gate implementation levels. A short discussion about the historical perspective of Assertions and why current Assertion standards are ill equipped to apply to SystemC based System Level designs is also presented. We conclude by listing the values you derive in using NSCa in your next System Level design project.

Access the entire document on the JEDA Technologies, Inc. website.

E-mail JEDA Technologies, Inc. for more information.

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JEDA Technologies, Inc.
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Keywords: JEDA Technologies, ASICs, ASIC design, assertions, assertion based verification, assertion-based verification, ABV, SystemC, electronic system level design, ESL, formal verification, system-on-chip, SoC, EDA tools,
205/27731 12/26/2008 6065 326
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