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Advanced Virtual Platform Validation Methodology  
Company: JEDA Technologies, Inc.
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The objective of this short summary paper is to show to ESL model and platform developers as well as system architects how to use advanced ESL model validation methodologies to increase model quality and thus reduce the time spend to development and debug ESL virtual platform models. We used the OCP-based Sonics SMX Smart Interconnect model as an example to show an advanced validation flow for ESL models. OCP represents a flexible, but complex interface which has multiple implementations with growing importance for multi-core, SOC design. Sonics SMX Smart Interconnect is one of the implementations, which uses the OCP interconnect. The presented methodology can be also applied to other protocols and smart interconnects.

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Keywords: JEDA Technologies, ASICs, ASIC design, electronic system level design, ESL, IP, intellectual property, cores, network-on-chip, NoC, on-chip interconnect, Open Core Protocol, OCP, EDA tools,
205/27735 12/26/2008 9290 295
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