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Leveraging Standards When Times Are Tough  
Contributor: OCP International Partnership (OCP-IP)
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February 16, 2009 -- During tough economic times, the instinct of many companies can be to cut back on their commitment to standards groups and industry organizations. This can inhibit the organization’s ability to deliver the most value to members who are in their most critical time of need. In reality, properly leveraging organizations’ tools and infrastructure can — and will — save companies hundreds of thousands of dollars annually. So, the smart move in tough economic times is actually to increase your commitment to standards, thereby leveraging the time and effort of the best in the business by sharing the cost of R&D. Using OCP-IP as an example, let’s take a look at exactly how this works.

Initially, member companies benefited from the well-documented OCP Specification that effectively replaced their own (usually) poorly-maintained and supported internal alternative. Using OCP freed companies from investing significant time and R&D funds (saving many hundreds of thousands of dollars per year) that would otherwise be required to develop, document, and maintain the member’s own proprietary interface specification, tools, and training materials.

OCP-IP members have enjoyed great productivity from our working group (WG) collaborations and robust adoption and technical support of the OCP standard itself. Members have also enjoyed extensive use of, and contribution to, our infrastructure. Member contributions of expertise allow us to spread R&D costs across multiple companies in addition to ensuring best-of-breed tools.

The Specification Working Group (SWG) develops and publishes the OCP Specification. In the coming months, the SWG will publish OCP 3.0, which contains a high-speed profile, cache coherency solutions for multiple processor types, power management, and other elements.

Consensus profiles provide engineers with standardized configurations of OCP options for specific system use cases, ensuring interoperability without conversion. The profiles provide examples of optimized OCP interface configurations for standard communication functions, such as block data flow or register access, to help map the requirements of new IP block designs to the relevant OCP configuration parameters. Leveraging Consensus Profiles allows interoperability without conversion, thus ensuring quicker time-to-market. Time-to-market is always a critical factor, but even more so in tough economic times.

A cache solution has been integrated into OCP 3.0 and is relevant for all types of processors, i.e., graphics engines, DSPs, memory, etc., not just embedded processors. Using the cache coherence solution eliminates the need for OCP-IP members to define, validate and document their own solution, thereby saving them considerable money and time.

Our Functional Verification Working Group (FVWG) develops all OCP functional checks and assertions. The next phase of work will be to create the checks and assertions to support OCP 3.0. These checks and assertions will again be available free to OCP members. This eliminates the need to create and validate these for themselves, thus freeing members to focus on other critical design issues.

OCP-IP’s Debug Working Group (DWG) has developed and published the OCP Debug Socket Specification. The debug solution is an optional industry-inclusive OCP port, implementing a Debug Interface Socket, which supports a uniform method of on-chip system analysis and access to embedded information at the core, multicore, and systems levels. Adding this optional port to a design ensures greater visibility into the design as a whole, again saving a tremendous amount of time (and thus money) in the debug process.

The NoC Benchmarking Working Group (NBWG) has developed and published a two-part standard enabling different NoCs to be benchmarked against one another. What does this mean for OCP-IP members? Less time spent comparing which NoC is right for your design! This again saves a lot of time and money.

The System Level Design Working Group (SLDWG) developed and supports world-class, complete SystemC-based transaction level model (TLM) kits. In 2H08, they completed the development work for an advanced TLM kit that ensures the technical leadership and superior performance of their shared offering through 2010. Our working relationship with OSCI ensures complete compatibility between the two groups.

OCP-IP has been successful because our members understand our value and productively leverage our infrastructure. All of the above mentioned tools, and many more, are available FREE to our members as part of their subscription entitlement. Above all, we appreciate the membership’s commitment of resources and money to an enterprise that benefits them with time-to-market advantages, cost-savings and shared industry expertise that in-turn multiplies their own contributions. This commitment represents a powerful endorsement of what is possible through industry collaboration and the committed use of standards.

By Ian Mackintosh, Chairman and President, OCP-IP

Go to the OCP International Partnership (OCP-IP) website to learn more.

Keywords: SOCcentral, OCP International Partnership (OCP-IP), ASICs, ASIC design, FPGA design, IP, intellectual property, cores, EDA tools,
488/28057 2/16/2009 2402 2402
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