SOCcentral: Processor Architecture Not a Factor for Low-Power Mobile Systems (EE Times Signal Processing DesignLine 28686)

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Sunday, May 19, 2013

Processor Architecture Not a Factor for Low-Power Mobile Systems

Publication: EE Times Signal Processing DesignLine

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April 20, 2009 -- Much is made in marketing literature of the energy efficiency of different processor architectures. The power consumption of the processor is relevant but a small component of the overall power budget of the device. The instruction set architecture (x86, ARM, or otherwise) has a minimal effect on the power consumption of a processor and is of negligible consequence to the mobile system power budget.

By Jonah Probell. (Probell is with YAP IP.)

This brief introduction has been excerpted from the original copyrighted article.

View the entire article on the EE Times Signal Processing DesignLine website.

Keywords: EE Times Signal Processing DesignLine, YAP IP, ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, microprocessors, MPUs, IP, intellectual property, cores,

590/28686 4/20/2009 4791 238

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