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Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models  
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January 12, 2010 -- Synopsys, Inc. today announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC Initiative (OSCI) TLM-2.0 API specification. The models are TLM representations of the Synopsys DesignWare SuperSpeed USB 3.0 Device and xHCI Host Controller IP. The SuperSpeed USB 3.0 models enable pre-RTL and pre-silicon software development, verification and architecture exploration. They are part of the DesignWare System-Level Library which features more than 100 TLM models, including models of the DesignWare Interface IP portfolio.

With the integration of SuperSpeed USB 3.0 into advanced SOCs and the increasing complexity of software stacks, the need to develop the associated embedded software as early as possible increases. The availability of ready-to-use SuperSpeed USB 3.0 TLM models, which are cross-verified with the corresponding DesignWare SuperSpeed USB 3.0 Interface IP and the associated Linux drivers, enables rapid development of virtual platforms for designs integrating the SuperSpeed USB 3.0 Interface.

Virtual platforms enable the concurrent development and debug of hardware and embedded software using an executable model of the hardware long before RTL and first silicon are available. Like all models in the DesignWare System-Level Library, the SuperSpeed USB 3.0 TLM models work in any IEEE1666-compliant SystemC simulator, including Synopsys' Innovator for virtual platforms and VCS for functional verification. Adhering to the TLM-2.0 specification allows for easy integration, with models coming from different sources, regardless of the simulation environment.

"A virtual platform software development environment, as provided by Synopsys, is critical to reducing our time-to-market and overall product cost when delivering our USB 2.0 and SuperSpeed USB 3.0 software stacks," said Terry Moore, CEO of MCCI. "The Synopsys USB virtual platforms developed with Innovator and DesignWare System-Level Library have proven themselves invaluable to MCCI and to our customers many times over. Our USB stack is ported and available for the customer's platform much earlier in their product development than without using virtual platforms. This saves us and our customers critical time."

The DesignWare System-Level Library is part of Synopsys' Software-to-Silicon Verification Solution that offers the industry's most comprehensive suite of proven embedded software development, system validation, functional verification and circuit simulation software, hardware, intellectual property (IP), methodologies and services for complex system-on-chip (SOC) development. The solution includes the Confirma rapid prototyping products, the VCS high-performance simulator, DesignWare IP, DesignWare System-Level Library and Innovator, enabling hybrid virtual/ physical prototyping environment for embedded software development and verification.

Availability

The DesignWare System-Level Library featuring the TLM-2.0 models for 3.0 is available immediately; existing licensees receive it as a regular maintenance update.

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Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, SuperSpeed USB, models, modeling, transaction level modeling, transaction-level modeling, TLM, SystemC, Synopsys,
597/30431 1/12/2010 3491 75
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