November 4, 2010 -- Increasing design complexity and high manufacturing costs have made industry reach at a point where it is almost essential to develop SOCs with some flexibility of post modification. The two most prominent members which are symbol of flexibility are Processors and FPGAs. Due to tough market pressures and stringent power challenges faced by industry it has become much interesting now compared to past to find a new marriage between SOCs and FPGAs in places where only SOC or FPGA stand alone independently can have tough challenge to meet requirements.
This gives birth to embedded FPGAs (eFPGAs) for which Menta is playing a pioneering role to bring it to commercial level with industry standard tools to help semiconductor industry take benefits of FPGAs directly inside their SOCs in the form of customizable domain specific eFPGA IP block/blocks.
This article presents a brief overview of new generation of graphical tools suites we are developing to help our clients quickly and very easily obtain the customized eFPGA IP of their needs (area, power, speed, I/Os, target node, etc.) this benefit is hard to achieve with classical device based FPGAs.
By Syed Zahid Ahmed, Alexandre Martheley, Laurent Rougé, Julien Eydoux and Jean-Baptiste Cuelle. (All are with Menra S.A.S.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the Design & Reuse website.
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