| Variation-Aware Custom IC Design Report 2011 Recommended | Company: Solido Design Automation, Inc.
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This report covers the results of an independent worldwide custom IC design survey. The survey was executed in late 2010, with 486 IC design professionals participating.
The Variation-Aware Custom Design report takes a closer look at trends associated with design variation, defined as the variation in parametric results caused by process and environmental (PVT), random variation, and layout dependent effects (parasitics, proximity). Its scope includes: general variation technology trends and factors in custom IC design; the impact of variation on project deadlines and financials; and adoption of commercial variation design systems.
The comprehensive feedback from custom IC designers and engineering management can be used to understand how variation is impacting semiconductor company management’s ability to meet design specifications and deadlines. This becomes especially critical with the increasing impact of variation with shrinking process geometries.
The topics covered in this report are:
- Survey methodology and demographics.
- Custom IC areas where most advancement sought.
- Driving reasons for variation-aware design.
- Variation impact on project deadlines and tapeouts.
- Designer time spent managing variation.
- Plans to implement variation-aware design tools in 2011.
- Process nodes where variation-aware design becomes important.
- Ranking of custom IC design tools to be made variation-aware.
- Summary and financial impact.
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| E-mail Solido Design Automation, Inc. for more information.
Read more about
Solido Design Automation, Inc.
on SOCcentral.com |
| Keywords: ASICs, ASIC design, custom IC design, EDA, EDA tools, electronic design automation, design for manufacturing, design-for-manufacturing, DFM, design for yield, design-for-yield, DFY, variation-aware design, Solido Design Automation,
| | 205/33199 2/17/2011 1670 161 | Add a comment or evaluation (anonymous postings will be deleted)
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