Page loading . . .

  
 You are at: The item(s) you requested.Saturday, May 18, 2013
Aldec's Emulation and Verification Tools Adopted by UC San Diego for the New Master's Program in Wireless Embedded Systems  
 Printer friendly
 E-Mail Item URL

July 25, 2011 -- Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, today announced that University of California, San Diego has adopted Aldec's emulation and verification tools for its new and innovative Master of Advanced Studies (MAS) program in Wireless Embedded Systems. As part of the mutual agreement, Aldec will supply Riviera-PRO mixed-language RTL and gate-level simulation and HES emulation solutions to provide the master's program with world-class commercial EDA products.

"The MAS program in Wireless Embedded Systems allows professional engineers to take advantage of UC San Diego's world-renowned expertise in embedded systems and wireless communications," said computer science professor Ryan Kastner, Co-Director of MAS in Wireless Embedded Systems at the UC San Diego Jacobs School of Engineering. "It has a project-oriented focus that is highlighted by embedded systems prototyping using Aldec tools: Riviera-PRO for RTL and gate-level simulation, and HES for emulation and prototyping, in which both are integral design tools used in our program. The program provides the students a unique opportunity to build complete, state-of-the-art systems using advanced commercial tools."

"The MAS Wireless Embedded Systems program is a model for master's degrees in engineering; intense hands-on experience and training for the engineering talent of tomorrow in state-of-the-art laboratories with substantial guidance from working engineers," said professor Rajesh Gupta, Chair of the Department of Computer Science and Engineering. "We are grateful to Qualcomm, Aldec, Intel, Cypress, and other companies for making such labs possible."

"We value greatly our commitment to education and believe in the importance of educating both working and future engineers with leading-edge verification methodologies and tools," said Dr. Stanley Hyduke, CEO of Aldec. "More importantly, we will be providing extensive tool support and training for the success of UC San Diego's MAS program in Wireless Embedded Systems."

About UCSD's MAS program in Wireless Embedded Systems

The UC San Diego Jacobs School of Engineering is launching an innovative new master's degree program tailored to the needs of industry and engineering professionals beginning in Fall 2011. The MAS program in Wireless Embedded Systems allows students to gain a deep and broad education in the multidisciplinary fundamentals of wireless communications and embedded system design. In this program, engineering professionals gain understanding of the tradeoffs between the hardware/ software capabilities in embedded devices, and the limitations of the communication channel and communications algorithms. Courses are taught by UC San Diego's world-class electrical engineering, computer science, and computer engineering faculty.

About HES

HES is a complete hardware-based verification solution for large and complex SOC/ ASIC designs that provides a unified platform for simulation acceleration, transaction-level emulation, HW/SW co-verification, software validation, virtual modeling and prototyping. HES includes transaction level modeling (TLM) with SCE-MI for high-performance emulation using FPGA-based prototyping boards from Aldec, Dini Group, Synopsys, HAPS, or custom in-house boards with tens of millions of ASIC gates.

About Riviera-PRO

Riviera-PRO is a multi-platform, high-performance, mixed-language RTL and gate-level simulator for ASIC and FPGA designs. Riviera-RO includes advanced debugging tools and support of advanced verification methodologies with SystemC and SystemVerilog, assertion-based verification (ABV), transaction-level modeling (TLM) and VHDL/ Verilog design rule checking.

Go to the Aldec, Inc. website to find additional information.

E-mail Aldec, Inc. for more information.

Read more about
Aldec, Inc.
on SOCcentral.com


Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, EDA, EDA tools, electronic design automation, emulators, emulation, verification, RF design, wireless, SystemC, SystemVerilog, assertion based verification, assertion-based verification, ABV, transaction level modeling, transaction-level modeling, TLM, Aldec, Riviera-PRO,
600/34351 7/25/2011 670 94


Designer's Mall
0.390625



Copyright 2002 - 2004 Tech Pro Communications, P.O. Box 1801, Merrimack, NH 03054
 Search site for:
    Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Exec Viewpoint

Yes, Virginia,
There Is a
Stitch-and-Ship


Dave Johnson
VP of Sales
Breker Verification

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
1  0.46875