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3D's Supporting Players  
Publication: Electronic Engineering Journal
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July 25, 2011 -- 3D gets lots of attention these days. Whether it's the massive success of a movie that spawns a gaggle of followers making every possible consumer item 3D, the added dimension of the fin on a FinFET (or tri-gate) transistor, or the stacking of chips using TSVs or other technology, you just can't seem to go wrong with 3D.

When it comes to stacking dice, it's the TSVs or the silicon interposers that tend to take center stage. Not surprising, since they're new and interesting technology. And we've already taken a look at Mentor's and Cadence's approaches to DFT with TSVs. But what about the rest of the design process? Does everyone else proceed as usual while the 3D star preens and acts out?

The answer to that is actually yes and no. Yes, things do need to change. And they will need to continue to change for a while. But, in principle, life pretty much goes on.

By Bryon Moyer, Contributing Editor.

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the Electronic Engineering Journal website.

Keywords: ASICs, ASIC design, custom IC design, packages, packaging, 3D ICs, 3D chips, stacked ICs, through-silicon vias, TSV, EDA, EDA tools, electronic design automation, Electronic Engineering Journal,
599/34457 7/25/2011 626 116


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