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Developing Processor-Compatible C-Code for FPGA Hardware Acceleration  
Publication: EE Times Embedded
Contributor: Impulse Accelerated Technologies, Inc.
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August 21, 2011 -- FPGAs are becoming increasingly popular with software teams to accelerate critical portions of their code. In most cases these teams already have processing stacks and applications written in C that target embedded microprocessors or servers. For applications that require acceleration, a logical next step is to off-load some portion of the code to an FPGA. A good way to do this is to migrate portions of the working microprocessor system to an FPGA while keeping the code base compatible with the original processor.

This article describes how to identify which code sections can best benefit from hardware acceleration, use coding styles to retain commonality, and select hardware for both development and deployment.

By David Pellerin and Brian Durwood. (Durwood is the CEO of Impulse Accelerated Technologies, Inc. and Pellerin is co-founder and technical advisor.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Embedded website.

Read more about
Impulse Accelerated Technologies, Inc.
on SOCcentral.com

Keywords: FPGAs, field programmable gate arrays, FPGA design, EDA, EDA tools, electronic design automation, software development tools, hardware acceleration, Impulse Accelerated Technologies, EE Times Embedded
599/34657 8/21/2011 548 65


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