September 20, 2011 -- Synopsys, Inc. today announced new capabilities in TetraMAX ATPG and Yield Explorer that decrease the time, effort and cost of deploying a volume diagnostics flow and speed-up yield ramp.

When yield has not yet reached acceptable levels during initial manufacturing phases, IC product teams must quickly identify and fix the dominant causes of yield loss. Synopsys' enhanced volume-diagnostics solution cross-correlates large volumes of data from design, fab and manufacturing test to thoroughly analyze the causes of yield-limiting defects.

The latest releases of TetraMAX ATPG and Yield Explorer automate the flow and help to ensure high throughput with a new direct connection between the two products, and functionality to import both physical design and test data from defective silicon using industry-standard formats. These innovations lead to fast, cost-effective deployment of volume diagnostics, shorter time to production yield and improved profit margins for semiconductor companies.

"Quickly diagnosing defects in silicon parts and improving yield requires a robust way to import silicon failure data from the tester," said Tom Morrow, Executive Vice President, SEMI. "Product teams can swiftly transfer this critical data from a broad range of testers into TetraMAX ATPG and Yield Explorer using the new STDF V4-2007 format developed by SEMI's CAST working group."

Volume diagnostics are essential for efficiently determining the causes of silicon failures that cut into IC profit margins and impact time-to-quality. Synopsys' enhanced volume-diagnostics solution consists of two products: TetraMAX ATPG identifies potential defects from scan-test failures, using physical design data to significantly improve diagnostics accuracy; Yield Explorer analyzes these potential defects across multiple failing devices to uncover systematic yield issues, also using physical design data to identify specific yield-limiting layout geometries.

In the latest release, TetraMAX ATPG directly connects to Yield Explorer for fast deployment of the solution and to improve data throughput for production runs that require massive quantities of design, test and fab data. In addition, new support of industry-standard formats maximizes engineering productivity: LEF/DEF facilitates easy, one-time import of physical design data, and STDF V4-2007 enables transfer of defective silicon data from industry-leading testers.