Synopsys is a technology leader for complex integrated circuit (IC) design. By providing best-in-class tools, from high-level synthesis to deep submicron verification, advanced design flows and expert professional services, Synopsys is an essential partner to companies that design leading-edge ICs, ASICs and systems on a chip (SoCs).

News
Synopsys DFTMAX Compression Cuts Pin-Limited Test Cost by 95% at Silicon Image	9/9/2010
Synopsys DesignWare SATA IP Enables First-Pass Silicon Success for Global Unichip Corporation	8/26/2010
Synopsys Announces Immediate Availability of DesignWare MIPI M-PHY IP in 40-nm Process Technology	8/25/2010
Synopsys Launches DesignWare USB Software Alliance Program	8/16/2010
Synopsys Adds TDD Support to LTE Model Library	8/11/2010
Synopsys and Lattice Renew OEM Relationship for FPGA Synthesis Software	8/11/2010
Synopsys Galaxy Implementation Platform Used by TSMC for 28-nm Process	8/9/2010
Synopsys Custom Design Tools Enable Creative Chips to Achieve First-pass Silicon Success	8/5/2010
Synopsys Design Compiler Graphical Shortens Design Schedule at Oticon	7/28/2010
Synopsys First to Deliver High-Performance Audio IP in 40-nm and 55-nm Process Technologies	7/28/2010
Foveon Switches to Galaxy Custom Designer Solution to Accelerate Time-to-Tapeout	7/26/2010
SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization	7/14/2010
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100% Silicon Success	7/7/2010
ARM, IBM, Samsung, GlobalFoundries and Synopsys Announce Delivery of 32-/ 28-nm HKMG Vertically Optimized Design Platform	6/17/2010
PrimeTime 2010 Scales Timing Analysis Beyond 500 Million Instances	6/17/2010
Synopsys Delivers Optimized Lynx Design System for Common Platform 32/28-nm Technology	6/17/2010
Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories	6/17/2010
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup	6/17/2010
Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/ Mixed-Signal Reference Flow 1.0	6/11/2010
Synopsys to Acquire Virage Logic	6/11/2010
Synopsys and IEEE-ISTO Launch Technical Advisory Board to Evolve Interconnect Modeling Standard	6/7/2010
Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs	6/4/2010
Synopsys Press Publishes "The Ten Commandments for Effective Standards"	6/4/2010
Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65-nm LL Process Technology	5/13/2010
Latest Synopsys IC Compiler Release Delivers More than 2X Speed-Up, Enhanced In-Design Technology and Production Support for 28/32nm	5/7/2010
Synopsys Unveils Ethernet Controller IP with New Audio Video Bridging Feature	5/7/2010
Synopsys Launches Industrys First MIPI DigRF v4 IP	5/3/2010
New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces	4/28/2010
Synopsys Announces Support for Actel's New SmartFusion Intelligent Mixed-Signal FPGAs	4/22/2010
Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems	4/19/2010
Synopsys Expands IP OEM Partner Program with Two New Members	4/14/2010
Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards In a Single PHY	4/7/2010
Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification	4/5/2010
SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family	4/1/2010
Synopsys Galaxy Implementation Platform Enables First-pass Silicon Success on Infineon's 40-nm X-GOLD 626 Wireless Product	3/30/2010
Design Compiler 2010 Doubles Productivity of Synthesis and Place-and-Route	3/29/2010
Nationz Technologies Achieves First-Pass Silicon Success with CustomSim Mixed-Signal and VCS Functional Verification Solutions	3/23/2010
Renesas Technology Adopts Synopsys Proteus OPC for 28-nm Development	3/23/2010
Synopsys Completes Acquisition of CoWare	3/23/2010
IMEC and Synopsys Collaborate on 3D Stacked IC Development	3/10/2010
Synopsys Galaxy Custom Designer Accelerates Analog/ Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction	3/10/2010
Yamaha Tapes Out Graphics Chip with Synopsys Design Compiler Graphical	2/9/2010
APAC IC Adopts Synopsys Galaxy Custom Designer Solution for Analog/ Mixed-Signal IC Design Services	2/8/2010
Synopsys to Acquire CoWare	2/8/2010
Synopsys Acquires VaST Systems Technology	2/3/2010
Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions	1/25/2010
Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies	1/25/2010
Toshiba Information Systems Standardizes on VMM-LP Low-Power Verification Methodology	1/25/2010
Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs	1/13/2010
Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models	1/12/2010
Synopsys Multicore Technology Speeds Timing Sign-Off by 2X	1/11/2010
eSilicon Signs Multi-Year Agreement with Synopsys	12/18/2009
X-FAB Now Supports Synopsys Galaxy Custom Designer	12/18/2009
Loongson Achieves First-Pass Silicon Success on High-Performance CPU with Synopsys CustomSim Circuit Simulation Solution	12/9/2009
Hisilicon Tags Synopsys as Primary EDA Partner	12/8/2009
Synopsys Expands DesignWare Data Converter IP Portfolio with 40-nm Solutions	11/27/2009
Digital Imaging Systems Achieves First-Pass Silicon Success with Synopsys Galaxy Custom Designer	11/17/2009
Synopsys Extends DFTMAX Compression to Reduce the Cost of Pin-Limited Test	11/2/2009
Juniper Chooses Synopsys as Its Primary EDA Partner	11/1/2009
NVIDIA Adopts Synopsys Yield Explorer to Reduce Time-to-Volume	10/29/2009
Synopsys Announces 40th DesignWare Audio Codec IP	10/29/2009
Synopsys Unveils 30% Smaller Area, Low-Power USB 2.0 PHY IP for 28-nm Processes	10/29/2009
Freescale and Synopsys Announce Strategic Collaboration Agreement to Increase Verification Productivity	10/27/2009
Synopsys Enables Optimized High-Performance Energy-Efficient ARM Processor-based Designs	10/21/2009
Synopsys Introduces Synphony High-Level Synthesis	10/14/2009
Synopsys DesignWare USB 2.0 and Ethernet IP Enables First-Pass Silicon Success for STMicroelectronics	10/8/2009
Synopsys' Sentaurus TCAD Used to Simulate Solar Cell Performance Characteristics at NREL	10/8/2009
Synopsys Unveils StarRC Custom Parasitic Extraction Solution	9/21/2009
TSMC Selects Synopsys HSIM Simulator for Sub-40nm Memory IP Characterization	9/16/2009
Synopsys Announces DDR3 IP with Support for 2133-Mbps Data Rates and 1.35V DDR3L	9/10/2009
Renesas Technology Selects Synopsys Proteus OPC for 45-nm Node Production	8/25/2009
Synopsys Delivers Comprehensive HDMI IP Solution for 90-nm to 40-nm Process Technologies	8/13/2009
Rockchip Collaborates with Synopsys and Chartered to Achieve First-Pass Silicon Success	8/3/2009
Synfora Joins Synopsys System-Level Catalyst Program	7/31/2009
Teradici Chooses Synopsys As Its Primary EDA Partner	7/31/2009
Synopsys Introduces Galaxy 2009 with 2X Faster Throughput	7/29/2009
Synopsys Galaxy Implementation Platform Supports TSMC 28-nm Process Technology with Reference Flow 10.0	7/23/2009
Synopsys and TSMC Jointly Develop Interoperable Process Design Kit (iPDK) and Interoperable Ecosystem	7/22/2009
Achronix Deploys Synopsys IC Validator and IC Compiler for Next-Generation FPGA Design	7/20/2009
Synopsys' New DesignWare IP Slashes Power in Datapath Circuits	7/20/2009
Synopsys Unveils Complete IP Solution for PCI Express 3.0	7/15/2009
Synopsys MVSIM Adopted for Low-Power Verification of STw8500 Mobile SOC Platform	7/2/2009
Aquantia Deploys Synopsys IC Validator and IC Compiler for 40-nm Quad 10Gbase-T Design	6/30/2009
Achronix Selects Synopsys as Its Leading EDA Partner	6/25/2009
SMIC and Synopsys Announce Availability of Reference Flow 4.0	6/24/2009
Synopsys and TSMC Deliver Accurate Lithography Verification for 28-nm Designs	6/23/2009
Synopsys and Actel Renew OEM Relationship for FPGA Design Software	6/19/2009
Synopsys Adds New Features to Galaxy Custom Designer	6/16/2009
Infineon Technologies Achieves Successful Tapeout of Automotive MCU Using Synopsys IC Compiler with Zroute Technology	6/10/2009
TSMC Selects Synopsys Galaxy Implementation Platform for Integrated Sign-off Flow	6/10/2009
Synopsys Enables System Design Interoperability with System-Level Catalyst Program	6/8/2009
SMIC Deploys Synopsys HSpice Simulator for 45-nm Physical IP and Standard Cell Development	6/4/2009
Synopsys IC Compiler Multi-Corner/ Multi-Mode Capability Delivers 2X Faster Design Closure	6/4/2009
Synopsys Releases DesignWare SATA IP for New SATA 6-Gbps Data Transfer Rate	5/28/2009
TriQuint Selects Synopsys' TCAD Sentaurus for Compound Semiconductor Technology Development	5/28/2009
Exar Selects Synopsys as Its Leading EDA Partner	5/27/2009
Toshiba Selects Synopsys as Its Key EDA Partner	5/15/2009
Synopsys Acquires Analog Business Group of MIPS Technologies	5/13/2009
Synopsys IC Validator Adopted by NVIDIA for Sign-off Physical Verification	5/13/2009
Synopsys Launches IC Validator, Offers Significant Reduction in Physical Verification Turnaround Time for Advanced Designs	5/13/2009
Verivue Deploys VMM and Synopsys VCS Solution for Verification of Scalable Media Distribution Switch	4/30/2009
Tego Standardizes on VMM and Synopsys VCS Solution to Speed Verification of RFID Tags	4/28/2009
Wolfson Microelectronics Selects Synopsys as Its Primary EDA Partner	4/28/2009
Jungo Expands USB Collaboration with Synopsys to Include Software Support for SuperSpeed USB 3.0	4/23/2009
Synopsys Introduces Lower Power, High-Performance Architecture for AMBA 3 AXI On-Chip Interconnect	4/16/2009
Synopsys PrimeTime On-chip Variation Analysis Enables Renesas to Accelerate Timing Closure at 65-nm and Below	4/15/2009
Priva Technologies Integrates Synopsys Galaxy Custom Designer Solution Into SOC Design Flow	4/14/2009
Marvell Selects Synopsys as Its Primary EDA Partner	4/8/2009
Synopsys Introduces Discovery 2009 for Faster, Unified Verification Solutions	4/8/2009
Synopsys Boasts 2X Verification Speed-Up with VCS Multicore Technology	4/7/2009
Synopsys Unveils CustomSim Unified Circuit Simulation Solution	4/7/2009
Solar Energy Research Institute of Singapore Adopts Synopsys' Sentaurus TCAD for Solar Cell Research	4/3/2009
Synopsys Announces Yield Explorer for Design-Centric Yield Management	3/17/2009
Synopsys Introduces Lynx Design System	3/17/2009
Synopsys DesignWare USB 2.0 nanoPHY and PCI Express 1.1 PHY IP Achieves Compliance in UMC's 65-nm Process Technologies	3/13/2009
Synopsys DesignWare IP for PCI Express Passes Agilent Technologies' Inline Error Injection Testing	3/9/2009
Tundra Semiconductor Selects Synopsys as Its Primary EDA Partner	3/9/2009
Synopsys Enhances DesignWare DDR PHY IP with Service to Verify Signal Integrity	2/26/2009
Synopsys, Powerchip and Nikon Collaborate on 42-nm Flash Memory Optimization	2/26/2009
Low-Power Verification Methodology Manual Now Available	2/24/2009
LSI Selects Synopsys as Its Primary EDA Partner	2/19/2009
Synopsys Delivers Multi-Core Support with Latest PrimeTime Release	2/16/2009
New DesignWare Verification IP Alliance Program Expands Availability of High-Quality VMM-Enabled Verification IP	2/12/2009
Synopsys Expands Confirma Rapid Prototyping Platform	2/10/2009
Synopsys Expands DesignWare SuperSpeed USB IP Offering with xHCI Host Controller	2/5/2009
Synopsys Expands Collaboration with STMicroelectronics in Timing Sign-Off	1/27/2009
Synopsys Enhances DesignWare Ethernet IP with Support for IEEE 1588 Specification and ARM AMBA 3 AXI Interface	1/21/2009
Sequans Communications Achieves First-Pass Silicon Success with Synopsys DesignWare USB 2.0 nanoPHY IP	1/19/2009
Synopsys DesignWare Controller and PHY IP for PCI Express Pass PCI-SIG 2.0 Compliance Testing	1/8/2009
Synopsys and STMicroelectronics Accelerate 32-nm Readiness with Optimized Standard Cell Library and Route-Rule Validation in IC Compiler	12/19/2008
Synopsys Completes Acquisition of ProDesign's CHIPit Business Unit	12/19/2008
Synopsys 40-nm USB 2.0 PHY IP First to Pass USB-IF Certification	12/18/2008
Synopsys Expands Confirma Hardware-Assisted Verification Solution with the HAPS-A31 System	12/16/2008
STARC to Deploy Synopsys IC Compiler's Zroute and Clock Mesh Technologies in STARCAD-CEL	12/9/2008
Synopsys to Acquire ProDesign's CHIPit Business Unit	12/2/2008
Creative Chips Adopts Synopsys' Galaxy Custom Designer Mixed-Signal Implementation Solution	11/25/2008
Synopsys Unveils IP OEM Partner Program with Arrow Electronics, Global Unichip and Open-Silicon	11/24/2008
Synopsys Unveils Modeling Technology to Address Library Data Size Explosion at 45-nm and Below	11/20/2008
MCCI Partners with Synopsys to Accelerate SuperSpeed USB Development	11/18/2008
Synopsys Announces Complete SuperSpeed USB IP Solution Consisting of Device Controller, PHY and Verification IP	11/13/2008
Synopsys Makes Key Contribution to the IPL Alliance	11/7/2008
Ubixum Adopts Synopsys Galaxy Custom Designer Mixed-Signal Implementation Solution	11/4/2008
Synopsys Announces Availability of DesignWare SATA PHY IP in SMIC 130-nm Process Technology	10/31/2008
Fukuoka IST Selects Synopsys as Its Primary EDA Supplier	10/16/2008
Synopsys Delivers 2X Speed-Up with IC Compiler 2008.09	9/30/2008
Synopsys Adds Incremental Sign-off-Quality Design Rule Checking to IC Compiler	9/26/2008
Synopsys Announces Tapeout of NEC Electronics' Latest EMMA System LSI Using IC Compiler	9/25/2008
Synopsys Enters Mixed-Signal Implementation Market with Galaxy Custom Designer	9/22/2008
Aart de Geus Selected to Receive the 15th Annual Phil Kaufman Award	9/16/2008
Entropic Communications Tapes Out Home Networking Device Using New Zroute Technology in Synopsys IC Compiler	9/16/2008
Synopsys and Ovonyx Collaborate on TCAD Models for Phase Change Memory	9/11/2008
Synopsys HSpice Simulator Delivers 6X Faster Throughput for Intrinsity's 45-nm Technology Development	9/11/2008
Leading European Design Consulting Firms Standardize on VMM Verification Methodology	8/27/2008
Synopsys DesignWare IP for PCI Express Used as the Gold Standard in Intel Lab at Intel Developer Forum	8/15/2008
Alchip Adopts Synopsys' Eclypse Low-Power Solution	8/13/2008
Synopsys Launches Full Range of Silicon-Proven DDR3 and DDR2 IP Solutions for SOC Designs	8/13/2008
Synopsys Selected by National Semiconductor as Key EDA Partner	7/28/2008
Synopsys Announces Availability of New Fully Synthesizable PowerPC Cores	7/24/2008
Synopsys and Mattson Collaborate on Advanced TCAD Process Simulation of Technology	7/16/2008
Synopsys Broadens DesignWare SATA Solution with Device IP	7/15/2008
Synopsys' DesignWare Verification IP Enhanced to Support New SATA 6-Gbps Specification	6/19/2008
Synopsys Discovery AMS Enables Analog Bits to Achieve 45-nm SerDes Verification	6/19/2008
Synopsys' TCAD Sentaurus Enables Development of Kodak's New Image Sensor Products	6/19/2008
Synopsys Announces DesignWare IP for PCI Express with PCI-SIG I/O Virtualization Technology	6/12/2008
Synopsys' Synplicity Announces New Products and Product Enhancements Providing Designers With a Faster Path to Silicon	6/11/2008
Synopsys and UMC Release 65-nm Low-Power Design Flow Enabled by the Unified Power Format	6/10/2008
Synopsys Delivers 45-nm Low Power Reference Flow for Common Platform Technology Validated with ARM Physical IP	6/10/2008
Synopsys Supports OSCI SystemC TLM-2.0	6/10/2008
ARM, Renesas Technology and Synopsys Define Industry's First Low-Power Verification Methodology	6/4/2008
MediaTek Achieves Faster Time-to-Tapeout Utilizing Smart Hierarchical Modeling in Synopsys IC Compiler	6/4/2008
Synopsys Introduces HAPS-51T ASIC Prototyping System	6/2/2008
Synopsys Releases VMM Methodology Standard Library and Applications Under Apache Open Source License	5/28/2008
Synopsys Unveils New IC Compiler Router Delivering 10X Speed Improvement	5/28/2008
Synopsys Announces Immediate Support for Altera Stratix IV FPGAs	5/20/2008
Synopsys Selected as Primary EDA Supplier By Matsushita	5/19/2008
Synopsys Adds 30 New Titles to DesignWare System-Level Library	5/16/2008
Synopsys and TSMC Collaborate on Advanced HSpice Modeling Technology for 40-nm Processes	5/15/2008
HiSilicon Selects Synopsys as IP Vendor Of Choice for SOC Designs	5/14/2008
Synopsys HSIM-XA Adopted by STMicroelectronics for Advanced Smart Power Technology	5/14/2008
Synopsys Donates Proven VMM Methodology Library and Applications to Accellera	5/12/2008
NextIO Standardizes on VMM Methodology and Synopsys VCS for Next-Generation I/O Virtualization Chip	5/9/2008
Synopsys Invests in Prover Technology	5/7/2008
Synopsys Releases Silicon-Proven 5.0-Gbps PCI Express 2.0 PHY IP	4/28/2008
Toshiba Adopts Synopsys Sentaurus TCAD Simulation for Development of Next-Generation Device Technologies	4/24/2008
Synopsys Delivers Certified USB 2.0 PHY IP for Advanced 45-nm Process	4/16/2008
Synopsys Enables First Silicon Success for First IC Designed in Vietnam	4/16/2008
Synopsys' New DesignWare IP Significantly Simplifies Transition to PCI Express	4/2/2008
Synopsys Extends Design Compiler Topographical Technology to Predict and Alleviate Routing Congestion	3/31/2008
Synopsys Star-RCXT Extraction Product Delivers 2X Performance Boost with Dual- Core Support	3/31/2008
The MathWorks Announces EDA Simulator Link DS for Synopsys VCS MX	3/24/2008
Synopsys to Acquire Synplicity	3/21/2008
Synopsys IC Compiler Routing Qualifies for TSMC's 45-nm Process	3/17/2008
Synopsys Launches HSpice Integrator Program With 25 Founding Members	3/11/2008
Synopsys Announces Multi-Core Initiative to Accelerate Design Time-to-Results	3/10/2008
Synopsys HSpice Delivers New Technology to Accelerate Circuit Simulation Performance	3/10/2008
Synopsys Enters Embedded Memory Market with Highly Differentiated IP	3/6/2008
PrimeYield LCC Enables Litho-Clean Tapeout for LG Electronics HDTV Application Chipset	3/4/2008
Synopsys and SMIC Deliver Enhanced 90-nm Reference Flow to Reduce IC Design and Test Costs	2/27/2008
Synopsys Introduces Concurrent Hierarchical Design System with Latest IC Compiler Release	2/27/2008
Synopsys Unveils Proteus Pipeline Technology	2/27/2008
Synopsys Introduces the Eclipse Low Power Solution	2/25/2008
Radiospire Standardizes on Synopsys VCS and VMM Methodology for Next-Generation AirHook Chipset Designs	2/15/2008
Synopsys TetraMAX ATPG Solution Boosts Structural Test Quality at STMicroelectronics	2/15/2008
LG Electronics Increases Quality of HDTV Chip Using Synopsys Test Solution	2/13/2008
Synopsys Expands USB IP Portfolio with New IP for Link Power Management and High Speed Inter-Chip Standards	2/4/2008
Synopsys' DesignWare DDR Protocol Controller IP Integrated Into Arteris' Network-On-Chip Interconnect Solution	1/30/2008
Synopsys and Acceleware Deliver Hardware Accelerated Solution for Design of Optoelectronic Devices	1/22/2008
Magma, Mentor Graphics and Synopsys Deliver Unified Power Format-Based Products	1/21/2008
Synopsys IC Compiler Used by Matsushita for First 45-nm SOC Design Tapeout	1/21/2008
STARC Adopts Synopsys PrimeTime VX as the Variation-Aware Timing Tool for Its STARCAD-CEL Methodology	1/14/2008
Silicon Canvas Laker Environment Integrates with Synopsys Hercules Physical Verification Suite	1/8/2008
iC-Haus Converts to Synopsys HSIM-XA for Its Zero-Defect Mixed-Signal Chips	1/7/2008
Synopsys Joins Chip Estimate's Prime IP Partner Program	12/12/2007
Synopsys, Altera and TSMC Collaboration Delivers Industry-Leading 45-Nanometer Extraction Accuracy	12/12/2007
Synopsys DesignWare IP Passes Certified Wireless USB Testing from USB-IF	11/26/2007
Altera and Synopsys Collaborate to Make Nios II Processor Core Available for ASIC Designs	11/13/2007
Synopsys Implements New High-Speed, Design-to-Mask Data Processing Software for TSMC Advanced Process Technologies	11/13/2007
Synopsys and UMC Deliver 65-nm Reference Flow	11/9/2007
Synopsys Selected to Develop 45-nm USB PHY IP for IBM Foundry Process	11/6/2007
Toshiba Standardizes on CCS Technology at 65nm to Improve Accuracy and Designer Productivity	11/6/2007
Renesas Selects Synopsys as Its Leading EDA Supplier	11/5/2007
Synopsys DesignWare IP for 5.0 Gbps PCI Express Enables First-Pass Silicon Success for PMC-Sierra	11/5/2007
Si2 Announces Synopsys' Contribution to the OpenAccess Coalition	10/31/2007
Synopsys Customers Accelerate Yield Learning With Converged Test and Yield Management Data Flow	10/23/2007
Synopsys Advances Low-Power Management for Manufacturing Test	10/22/2007
Synopsys Improves the Quality of Manufacturing Tests with Timing-Aware Pattern Generation	10/22/2007
Synopsys Joins OCP-IP Governing Steering Committee	10/16/2007
Synopsys Acquires Sandwork Design	10/2/2007
Global Unichip Adopts Synopsys Test Solution to Achieve Higher SOC Test Quality	9/28/2007
Synopsys HSpice Simulator Accelerates ARM's 45-nm Physical IP Development	9/28/2007
Synopsys DesignWare USB 2.0 NanoPHY and PCI Express PHY IP Achieve Compliance in SMIC's 130-nm Process Technology	9/20/2007
Synopsys Memory IP Development Environment Selected by UMC for Advanced Design Processes	9/19/2007
Nikon and Synopsys Announce Manufacturing-Aware DFM Solution for 45nm and Below	9/18/2007
Synopsys Announces DesignWare System-Level Library	9/17/2007
Synopsys HSpice Simulator and SiSoft Quantum-SI Combine to Deliver Robust Signal Integrity Analysis Solution	9/12/2007
Voltaire and Synopsys Introduce High-Performance Compute Solution to Reduce Cycle Time for Semiconductor Mask Manufacturing	9/11/2007
Dubai Silicon Oasis Chooses Synopsys to Establish First IC Design Center in the United Arab Emirates	9/5/2007
eRide Converts to Synopsys Design Compiler Ultra for Next-Generation GPS Chips	9/4/2007
Synopsys and SMIC Jointly Address China Mobile TV Market with Low Power Design Solution	8/29/2007
Synopsys Lowers the Cost of Semiconductor Testing at Tessolve	8/28/2007
Sharp Achieves Cost-Effective, Ultra-High-Quality Test Results Using Synopsys DFT MAX	8/27/2007
Intel Selects Synopsys as Its Primary EDA Supplier	8/6/2007
ProMOS Technologies Deploys Proteus OPC to Reduce Mask-Synthesis Cost-of-Ownership	7/19/2007
Synopsys NanoTime Improves Timing Verification on NetLogic Microsystems 65-nm Processor	7/17/2007
Synopsys to Acquire MOSAID Semiconductor IP Assets	7/16/2007
Teradici Selects Synopsys to Help Deliver Breakthrough PC-Over-IP Technology	7/9/2007
Synopsys Teams with UMC to Port Mixed-Signal Connectivity IP to 90- and 65-nm Process Technologies	6/27/2007
Solarflare Communications Tapes Out 10-Gigabit Ethernet Controller Chip Using Synopsys IC Compiler	6/20/2007
Synopsys Announces Virtual Platform for Marvell's PXA3xx Application Processors	6/19/2007
Synopsys Improves Sign-Off Accuracy for Advanced SOC Designs through Collaboration with NEC Electronics	6/19/2007
Synopsys Acquires ArchPro Design Automation	6/18/2007
Synopsys and Hitachi High-Technologies Deliver Enhanced OPC Modeling Speed, Accuracy and Predictability	6/12/2007
Synopsys Launches VMM Catalyst Program with More than 50 Member Companies	6/5/2007
Synopsys Supports TSMC Reference Flow 8.0 to Address 45-nm Design Challenges	6/4/2007
Synopsys and Zuken to Deliver Integrated PCB Design and Simulation Solution	5/30/2007
Synopsys Announces Comprehensive SATA AHCI IP Solution	5/30/2007
Synopsys and ARM Optimize Reference Methodology for Aggressive Power Management	5/29/2007
Synopsys IC Compiler Used by NEC Electronics for Tapeout of GHz Processor	5/29/2007
Toshiba Standardizes on Synopsys IC Compiler with Release of Orion V1.0 Design Kit	5/29/2007
ALi Accelerates Tapeout of Set-Top Box Chip Using Synopsys IC Compiler	5/25/2007
Synopsys Achieves 65-nm PCIe and 90-nm USB Compliance Utilizing Common Platform Technologies	5/24/2007
Synopsys and Synplicity Establish Alliance to Advance High-Performance ASIC Verification	5/24/2007
Casio Adopts Synopsys Design Compiler Topographical Technology to Reduce Time-to-Market	5/18/2007
Open-Silicon Adopts Synopsys DFT MAX to Lower the Manufacturing Cost of ASICs	5/17/2007
Synopsys Switch IP for PCI Express Passes PCI-SIG Compliance Testing	5/17/2007
Realtek Expedites ASIC Design with Synopsys Design Compiler Topographical Technology	5/16/2007
Synopsys Unveils Certified Hi-Speed USB On-the-Go nanoPHY IP for TSMC'S 65-nm Process	5/15/2007
Leading Semiconductor Companies in China Adopt the VMM Verification Methodology	5/14/2007
Synopsys Design Compiler Topographical Technology Adopted by IBM to Accelerate ASIC Designs	5/7/2007
Synopsys Releases Wireless USB WHCI Host and Dual-Role Device IP Based USB Specification from USB-IF	4/27/2007
Synopsys Enhances DesignWare Synthesizable IP for AMBA 2 and AMBA 3 AXI Protocols	4/25/2007
Synopsys and NanoGeometry Collaborate to Deliver Higher Modeling Accuracy and Predictability for 45-nm DFM	4/17/2007
Synopsys Design Compiler 2007 Boosts Designer Productivity and IC Performance	4/17/2007
Synopsys IC Compiler 2007 Release Boasts Significant Enhancements	4/17/2007
Splashpower Chooses Synopsys' Saber Simulator to Develop Advanced Wireless Power Technology	4/16/2007
OCP-IP Standardizes on Synopsys' DesignWare Verification IP for OCP-IP's CoreCreator Verification Toolset	4/10/2007
Synopsys Enhances Library Compiler to Put Current-Source Models Within Reach of Every Designer	4/4/2007
Synopsys Launches Liberty NCX Characterization Solution	4/4/2007
Synopsys Discovery AMS Delivers New Level of Performance and Accuracy for Integrated Analog and Mixed-Signal Verification	4/2/2007
Synopsys Accelerates Low-Power Designs with Comprehensive Implementation and Verification Solution	3/29/2007
Virage Logic Adds Liberty Composite Current Source Model Support to Memory and Logic IP	3/29/2007
Synopsys IC Compiler Enables Fully Automated 65-nm Implementation Flow for ARM Cortex-A8 Processor	3/28/2007
Renesas Technology Chooses Synopsys IC Compiler Solution for SOC Design Flow	3/27/2007
Synopsys Enables STMicroelectronics to Achieve First-Silicon Success for 65-nm Dual High-Definition MPEG-4 Decoder	3/27/2007
Synopsys TetraMAX Diagnostics for Rapid Yield Learning Adopted by UMC	3/19/2007
Synopsys Optimizes Hercules Physical Verification Suite for IBM 65-nm Design Kits	3/13/2007
Synopsys Primetime and Star-RCXT Solutions Deployed at Fujitsu as Standard for 65-nm Sign-Off	3/7/2007
Synopsys DFT MAX Cuts Test Costs 90% in Actions Semiconductor Designs	3/6/2007
TSMC and Synopsys Announce CCS Model Support for TSMC'S 65-nm Process	3/6/2007
Synopsys Extends VMM Methodology for Higher Functional Verification Productivity	3/5/2007
Synopsys Proteus OPC Delivers Superior Cost of Ownership on Intel Core Microarchitecture	2/27/2007
Synopsys DesignWare IP for PCI Express Supports NXP Semiconductors' PXPIPE PHY Interface	2/14/2007
Synopsys IP for PCI Express 2.0 (Gen II) Passes PCI-SIG Compliance	2/14/2007
Synopsys Design Compiler Topographical Technology Expedites ASIC Design at STMicroelectronics	2/12/2007
Mplicity Standardizes on Synopsys Formality Solution for Verification Of Multi-Core Design Flow	2/9/2007
Synopsys Donation of Variation-Aware Extension to SPEF Format Approved by IEEE 1481 Working Group	1/31/2007
Synopsys Named IBM-Authorized Power Architecture Design Center	1/29/2007
Novatek Uses Synopsys NanoSim Simulator with HVMOS to Improve Design Yield	1/16/2007
Oki Adopts DFT MAX to Improve Test Quality	1/16/2007
Silicon Optix Selects Synopsys IC Compiler for 90-nm Design	1/9/2007
Synopsys and UMC Enhance 90-nm Reference Flow with Advanced Low Power and Design for Test	1/9/2007
Renesas Adopts Synopsys' VCS Solution and VMM Methodology	1/8/2007
Tower Semiconductor Expands High-Voltage Technology Offering with Synopsys' Hercules PVS	12/12/2006
STARC Deploys Synopsys Design Compiler Topographical Technology in New 65nm Methodology	12/11/2006
Cypress Deploys Synopsys PrimeRail to Speed Tapeout of Mobile Phone IC Design	12/4/2006
Synopsys to Release a Complete, Single Vendor Interface IP for High-Performance DDR2 SDRAM Memory Subsystems	11/30/2006
Sanyo Improves Test Quality with the Adoption of DFT MAX	11/21/2006
Synopsys and Freescale Sign Verification Agreement	11/20/2006
Progate Tapes Out Advanced Mobile Communications Chip Using Synopsys IC Compiler	11/7/2006
Synopsys' New DesignWare Bridge IP for PCI Express to AMBA 2.0 AHB Connects Two Industry Standard Protocols	10/25/2006
Synopsys TetraMAX ATPG Diagnostics Now Linked With Synopsys Odyssey Yield Management System	10/24/2006
Synopsys and Virage Logic Collaborate on Test Reference Design Flow to Deliver Embedded Memory Test	10/23/2006
Synopsys Design Compiler Topographical Technology Accelerates Tapeout of 90-nm Multimedia Chip at ETRI	10/19/2006
Semiconductor Firms Collaborate with Synopsys to Validate New ATPG Technology	10/17/2006
Synopsys Enhances Saber Simulator Integration with UGS Software Through Global UGS Partner Program	10/17/2006
Synopsys Unveils New DFM Products to Solve Process-Related Variation Issues at 45nm and Beyond	10/16/2006
Exar Selects JupiterXT Power Network Synthesis to Achieve Optimized Power Layout	10/11/2006
Synopsys Introduces MinChip Technology Delivering Smallest Possible Chip Size for Volume Applications	10/9/2006
Synopsys and ARM Announce Immediate Availability of CCS Noise Models for ARM Physical IP	10/4/2006
Enterasys Adopts Synopsys' VCS Native Testbench for Accelerated Verification Productivity	10/3/2006
Displaytech Switches to Synopsys Design Compiler Tool for Next-Generation FLCOS Microdisplays	10/2/2006
Synopsys Triples Automatic Test Pattern Generation Performance for TetraMAX Test Tool	9/27/2006
Nikon and Synopsys Collaborate to Deliver Advanced DFM Lithography Solutions for 45nm and Below	9/22/2006
Virage Logic Adopts Synopsys' HSpice Simulator as Golden Simulator for 65-nm Library Sign-off	9/22/2006
Samsung Extends Use of Synopsys' Alt-PSM Technology for Advanced SRAM ICs	9/19/2006
Synopsys Donates Technology for Low Power Design to Accellera Standards Organization	9/19/2006
Synopsys Releases Verification IP for the OCP Interface	9/13/2006
Synopsys Releases Mixed-Signal PHY IP for SMIC 130-nm Process	9/7/2006
SMIC and Synopsys Deliver Reference Design Flow 3.0 for 90-nm Designs	9/5/2006
Synopsys Broadens DFM and TCAD Portfolio with Acquisition of SIGMA-C Software	8/16/2006
Bluespec Joins Synopsys In-Sync Program	8/15/2006
Synopsys Extends Liberty Modeling Standard to Enable Variation-Aware Design	8/2/2006
Synopsys Donates Library of Advanced SystemVerilog Assertion Checkers to Accellera	7/28/2006
Synopsys' PrimeYield Delivers Fast Turn-Around Time on Intel Dual-Core Xeon 5160 Processor	7/28/2006
Synopsys Delivers First 65-nm Reference Flow for IBM, Samsung and Chartered	7/21/2006
TSMC Reference Flow 7.0 Incorporates Synopsys' IC Compiler	7/21/2006
Semiconductor and IP Industry Leaders Join Synopsys and Si2 to Advance Liberty Modeling Standard	7/13/2006
IBM and Chartered Team with Synopsys for Mixed-Signal Connectivity IP at 65nm	7/12/2006
Synopsys 2006.06 Release of DesignWare Library Reduces Area and Delay in IC Designs	7/12/2006
Ross Video Selects Synopsys' VCS SystemVerilog Native Testbench to Increase Verification Productivity and Predictability	7/5/2006
Synopsys' IC Compiler Completes Tapeout of High-Density Sunplus Consumer Design	6/29/2006
Synopsys Introduces Validated USB 2.0 nanoPHY IP for TSMC's Nexsys 90-LP Process	6/28/2006
Synopsys Unveils NanoTime Next-Generation Transistor-Level Static Timing Analysis Solution	6/28/2006
Micronas Tapes Out HDTV Chip with Synopsys' IC Compiler	6/27/2006
Synopsys Sustains Momentum with 2006.06 Release of IC Compiler	6/26/2006
Renesas Design Vietnam Selects Synopsys as Its EDA Provider for SOC Design	6/13/2006
Synopsys Delivers New Release of Sentaurus TCAD Tool Suite on Dual-Core Intel Xeon Processors	6/13/2006
Synopsys' New DesignWare Bridge IP for PCI Express to AMBA 3 AXI Connects Two High-Performance Domains	6/7/2006
Synopsys' JupiterXT Tool Cuts Prototyping and Implementation Time on Cavium Networks' Octeon MIPS64 Processors	5/25/2006
Altera Deploys Synopsys' Star-RCXT Extraction Tool and HSIM Simulator to Achieve Silicon-Accurate 65-nm Designs	5/17/2006
Synopsys Acquires Virtio	5/17/2006
Synopsys Partners with TSMC to Offer Comprehensive DFM Solution for Yield Enhancement	5/17/2006
TSMC Names Synopsys to Distribute Its Production-Ready 65-nm Nexsys Libraries	5/17/2006
Design Compiler Topographical Technology-Based ARM-Synopsys Reference Methodology Delivers Higher Productivity	5/15/2006
Synopsys and Si2 Drive Open-Source Library Modeling to Next Level by Forming Technical Advisory Board	5/13/2006
SGI Adopts Synopsys Design Compiler Topographical Technology for Predictable RTL-to-GDSII Flow	5/8/2006
Synopsys Sets the Stage for Another Interoperability Initiative at the 17th EDA Interoperability Developers' Forum	5/4/2006
BiTMICRO Networks Standardizes on Synopsys' DesignWare PHY IP for PCI Express and SATA	5/2/2006
S3 Adopts Synopsys' VCS Verification Solution and the Verification Methodology Manual for SystemVerilog	5/2/2006
Synopsys Releases DesignWare Mobile Storage IP Featuring CE-ATA Support	4/26/2006
Synopsys Qualifies Automotive Industry Standard VHDL-AMS Models for Use with Saber Simulator	4/25/2006
NVIDIA Adopts Synopsys' Design Compiler Topographical Technology	4/24/2006
Agere Systems Standardizes on Synopsys Platforms for Design and Verification of Digital Systems	4/19/2006
Synopsys' DFT MAX Cuts Test Time and Cost on CSR Bluetooth Designs	4/19/2006
Synopsys' PSM Technology Adopted by Sony	4/17/2006
Hisilicon Technologies Adopts Synopsys' Galaxy Design Platform for Low-Power Design	4/10/2006
Sequans Standardizes on Synopsys VCS, System Studio and Formality Solutions for Verification of Broadband Wireless Access Chips	3/29/2006
Synopsys' DFT MAX Reduces Test Costs on NVIDIA Graphics Processing Units	3/29/2006
STARC Adopts IC Compiler to Boost Efficiency of Production Flow	3/27/2006
Cypress Deploys Synopsys Galaxy Design Platform	3/22/2006
Synopsys Announces Verification IP Library for SystemVerilog with Methodology Support	3/21/2006
Synopsys Delivers Complete SystemVerilog Design and Verification Flow	3/21/2006
Synopsys Provides EDA Solution for Sun Microsystems' UltraSPARC T1 Processor	3/21/2006
Synopsys Introduces Pilot Design Environment	2/27/2006
Synopsys, IBM, Chartered and ARM Collaborate to Extend Low-Power 90nm Reference Flow	2/27/2006
Tensilica Flow for Diamond Standard Processor Cores Employs Synopsys SoC Design and Verification Platforms	2/22/2006
Synopsys IC Compiler Enables STMicroelectronics to Speed the Tapeout of Ultra-Low-Power Nomadik Multimedia Processor	2/16/2006
Sigrity Enters IC Package Physical Design Market by Acquiring Technology License from Synopsys	2/7/2006
Synopsys' New Designware USB 2.0 nanoPHY IP to Cut Power and Size in Half	2/6/2006
ARM-Synopsys Verification Methodology Manual for SystemVerilog Endorsed by Leading Japanese Semiconductor Companies	1/25/2006
Synopsys DesignWare IP to Enable Next-Generation PCI Express 2.0 Products	1/25/2006
Synopsys' PSM Technology Adopted by NEC Electronics for 65-nm Production and Beyond	12/21/2005
AMCC Speeds Verification Using Synopsys' VCS Solution With SystemVerilog and e Testbench Migration Service	12/19/2005
Sun Microsystems and Synopsys Collaborate to Certify VCS Verification Solution for the Solaris 10 OS on x64 Platforms	12/15/2005
Synopsys Expands Mixed-Signal IP Portfolio with Interface Cell Libraries Featuring DDR2 SDRAM I/Os	12/14/2005
Synopsys Completes Acquisition of HPL Technologies	12/9/2005
Synopsys Offers First Certified TSMC 90-nm USB 2.0 OTG PHY IP	12/9/2005
Synopsys' Sentaurus Calibration Library Incorporates Varian Semiconductor Ion Implantation Process Data for Predictable TCAD Simulation	12/6/2005
Agere Systems Accelerates Tapeout of High-Performance SOC with Synopsys IC Compiler	11/28/2005
Synopsys and UMC Partner on Low Power 90-nm Reference Design Flow	11/21/2005
Synopsys' TetraMAX ATPG Delivers Significant Productivity Gains for Designers	11/8/2005
Synopsys Galaxy Design Platform Now Supports Composite Current Source Modeling Technology	11/7/2005
Synopsys Steps Ahead with New Nanometer Modeling Technology	11/7/2005
DongbuAnam Semiconductor and Synopsys Jointly Develop 130nm Reference Flow	11/4/2005
Genesis Microchip Adopts Synopsys' DFT MAX Adaptive Scan	11/2/2005
Synopsys Integrates Solution-Soft's Advanced GDSII and MEBES Compression Solutions with CATS	11/2/2005
Exar Triples Verification Productivity Using Synopsys' VCS Solution with SystemVerilog Testbench Automation	10/31/2005
TSMC Adopts Synopsys TetraMAX for Yield Diagnostics	10/24/2005
Cedar Point Utilizes Synopsys' VCS Native Testbench Technology for Safari C(3) VoIP Switch	10/19/2005
StarGen Verifies Advanced Serial Switched Interconnect Chips with Synopsys' VCS, VERA and VCS Verification Library Solutions	10/19/2005
Synopsys Introduces New Sentaurus Technology CAD (TCAD) Tool Suite	10/17/2005
Marvell Adopts Synopsys' Galaxy Platform for High-Performance Communications Products	10/10/2005
Synopsys and X-FAB Team to Accelerate Analog Mixed-Signal IC Design	10/5/2005
SEMATECH and Synopsys to Develop Advanced OPC Models for 45nm and Below Immersion Lithography	10/4/2005
Synopsys Helps Enable Implementation and Deployment of ARM Cortex-A8 Processor to Licensees	10/4/2005
Synopsys and ARM Announce Synopsys IC Compiler Incorporated in Latest ARM-Synopsys Reference Methodology	10/3/2005
Synopsys' HSPICE High-Voltage MOS Transistor Model Adopted by UMC	10/3/2005
Synopsys to Acquire HPL Technologies	10/3/2005
Synopsys and Alereon Demonstrate Interoperability for Certified Wireless USB Technology	9/26/2005
Synopsys and Realtek Collaborate to Provide Interoperable IP Solution for Certified Wireless USB Technology	9/26/2005
Synopsys Announces Low Power PHY IP for PCI Express, XAUI and SATA	9/26/2005
Synopsys Announces Wireless USB Device Controller IP Based on the Certified Wireless USB Specification	9/26/2005
Synopsys Introduces Pioneer-NTB for SystemVerilog Testbench Automation	9/26/2005
Synopsys Introduces VCS Verification Library to Speed Verification	9/26/2005
LSI Logic Adopts Synopsys' New Design Planning Capabilities for ASICs	9/21/2005
STMicroelectronics and Synopsys Demonstrate Interoperability of Their SATA IP Cores for 90nm Technology	9/21/2005
Synopsys Announces Source-Code License for SystemVerilog Verification Library	9/21/2005
Synopsys DesignWare Verification IP for AMBA 3 AXI Earns ARM "AMBA 3 Assured" Logo Certification	9/21/2005
Synopsys Speeds Development of High Performance Designs with AMBA 3 AXI Synthesizable IP in DesignWare Library	9/21/2005
Synopsys Extends Galaxy with JupiterIO for Concurrent Die and Package Floorplanning and Analysis	9/19/2005
Synopsys Demonstrates IP Reference Design Based on Certified Wireless USB Specification	8/24/2005
Dubai Silicon Oasis and Synopsys Provide Technology Tools to UAE Educational Institutions	8/22/2005
Silicon Logic Engineering Reduces Verification Development Time Using Synopsys' Reference Verification Methodology with VCS and Vera Solutions	7/27/2005
SMIC and Synopsys Announce Reference Design Flow 2.0	7/19/2005
Ansoft Releases TPA v4.2 with Seamless Integration to Synopsys' Encore	7/13/2005
Synopsys Announces Production Support for New OASIS File Transfer Format	7/12/2005
Renesas Technology Uses Synopsys' Galaxy Design Platform to Tape Out a 90-Nanometer Production Design	6/27/2005
STMicroelectronics Cuts Verification Time in Half with Synopsys' VCS RTL Verification Solution	6/22/2005
STARC Standardizes on Synopsys Tools for 90-nm Low Power Design in STARCAD-21 Flow	6/14/2005
Synopsys Announces Industry-Wide Support for Liberty Composite Current Source (CCS) Library Models	6/14/2005
Synopsys Joins Si2	6/14/2005
IBM, Intel and Synopsys Announce Mobile EDA Technology Initiative for Design Engineers	6/13/2005
Synopsys' Hercules Physical Verification Suite Delivers Near Linear Performance Increase on More than Fifty 64-Bit Xeon Processors	6/13/2005
Key Synopsys Low Power and DFM Technologies Support TSMC Reference Flow 6.0	6/9/2005
Oki Develops Analog Blocks Five Times Faster with Cadence Technology	6/8/2005
Synopsys and IBM Announce Availability of Fully Synthesizable PowerPC Cores and SystemC Models	6/8/2005
PDF Solutions and Synopsys Extend Liberty Library Format for Yield Optimization with IC Compiler	6/7/2005
Synopsys DFM Environment Selected by TI for Design and Process Development for the 65-nm Node and Beyond	6/7/2005
Toshiba Adopts Synopsys IC Compiler for Use in Its SoC Research and Development Center	6/7/2005
Synopsys Announces DesignWare IP Support for PCI Express 1.1 Specification	6/6/2005
Synopsys Enables Rapid Adoption of SATA Interface with DesignWare Verification IP	6/6/2005
Huawei Adopts Synopsys VCS Native Testbench to Accelerate Verification of Networking and Communications ASICs	5/31/2005
Synopsys Adds Assertion IP Library and Native Testbench Support for SystemVerilog to VCS	5/31/2005
IBM, Chartered Select Synopsys' Hi-Speed USB 2.0 and OTG PHYs for Their 90-Nanometer Process Platform	5/25/2005
Synopsys Provides Low-Power Reference Flow for IBM-Chartered 90-Nanometer Process Platform	5/25/2005
Synopsys i-Virtual Stepper System for Photomask Qualification Implemented by UMC	5/24/2005
Synopsys Unveils Latest Innovation in RTL Synthesis, Eliminating Wireload Models	5/23/2005
FishTail Joins Synopsys in-Sync Program	5/19/2005
Synopsys' Hi-Speed USB OTG IP Earns Hi-Speed USB OTG Certification	5/12/2005
Faraday Verifies Complex CPU Cores with Synopsys' VCS and Vera Verification Solutions	5/10/2005
Synopsys Delivers First Single-Vendor PCI Express IP Solution to Pass PCI-SIG Compliance	5/10/2005
Synopsys Introduces PrimeRail for Power Network Sign-Off	5/9/2005
Synopsys DesignWare IP Enables Full-Service SoC Design Foundry for Global UniChip	4/26/2005
CreVinn Adopts Synopsys' VCS Native Testbench to Accelerate ASIC Development	4/20/2005
Top Layer Networks Uses Synopsys' Testbench Automation Solution to Verify Network Security Chip	4/20/2005
Synopsys to Distribute Tower Semiconductor's 0.18- and 0.13-Micron Silicon Libraries within DesignWare Library	4/13/2005
Atmel Adopts Synopsys' VCS Native Testbench and SystemVerilog Assertions	4/4/2005
ProDesign Joins Synopsys in-Sync Program to Enable Unified ASIC Prototyping and Verification	4/4/2005
Synopsys Announces 15th EDA Interoperability Developers' Forum	4/1/2005
Synopsys Expands University Program by Donating Technology Licenses to Southern Methodist University	3/30/2005
Synopsys Unveils Galaxy IC Compiler	3/14/2005
Synopsys' coreAssembler Reduces Time and IP Integration Risk for Spirit-Compliant IP	3/8/2005
Synopsys Introduces Next Generation 1-Pass Test Synthesis Enabling Deep Submicron Test for Mainstream Designs	3/8/2005
ARM and Synopsys Announce Reference Flow for ARM11 Family with Intelligent Energy Manager Technology	2/28/2005
Synopsys and Hitachi Demonstrate 3Gb/s SATA II Interoperability Between DesignWare SATA Host IP Core and Deskstar Hard Drive	2/28/2005
Virage Logic Standardizes on Synopsys' ESP for Memory Verification	2/28/2005
Oki Standardizes on Synopsys' HSPICE High Voltage MOS Model	2/23/2005
Aarohi Deploys Synopsys' VCS Native Testbench to Verify Next-Generation Storage Chip	2/14/2005
NetSilicon Cuts Verification Time and Effort with Synopsys' Vera Tool	2/14/2005
Synopsys Introduces Migration Service from Verisity Specman Elite to Synopsys VCS	2/14/2005
Synopsys' Magellan Tool Wins IEC DesignVision Award	2/9/2005
Synopsys Reduces Area and Power Low Gate Count, Modular Hi-Speed USB On-The-Go Core	2/7/2005
Synopsys Announces Support for SUSE LINUX With Galaxy Design and Discovery Verification Platforms	2/2/2005
Chipidea Licenses Synopsys' Galaxy Design and Discovery Verification Platforms	2/1/2005
Synopsys and Altera Collaborate to Deliver "ASIC-Strength" Flow Supporting Stratix II FPGAs and HardCopy II Structured ASICs	1/31/2005
Toshiba Achieves 40% Power Reduction in Latest Media Embedded Processor Using Synopsys Galaxy Design Platform	1/24/2005
Celoxica Joins Synopsys in-Sync Program for Verification and Implementation	1/20/2005
Grace and Synopsys Jointly Develop Reference Design Flow	1/18/2005
Tensilica Uses Synopsys Design Compiler FPGA Tool to Improve Prototyping Design Flow	1/12/2005
CEVA Leverages Synopsys Tools for Tape Out of Mixed-signal, DSP and High Speed Serial Interface Chips	1/11/2005
Synopsys' ESP Full-Custom Memory Verification Enables Artisan to Achieve 5X Faster Time to Results	12/21/2004
UMC Enhances 90-nm Manufacturability Using Synopsys' Phase Shift Technology	12/20/2004
Synopsys Galaxy Design Platform Enables First-Pass Silicon Success of Winbond's Latest MPEG-4 Multimedia Chips	12/13/2004
Synopsys Announces First Fully Released Verification IP for the AMBA 3 AXI Standard	12/6/2004
Synopsys to Acquire Nassda	12/1/2004
Sasken Develops Reference Flow Based on Synopsys' Galaxy Design Platform	11/30/2004
Synopsys Announces Support for Galaxy Design and Discovery Verification Technology on Intel Xeon Processor With Extended Memory 64 Technology	11/18/2004
Micron Technology Picks Synopsys SiVL DFM Solution for 90-nm Production	11/16/2004
KLA-Tencor and Synopsys to Collaborate in Developing New Process Modeling for Real-Time Prediction of IC Performance for Toshiba	11/15/2004
Synopsys Acquires Assets of LEDA Design	11/2/2004
Hong Kong Science and Technology Parks Licenses Synopsys' DesignWare IP Cores Portfolio	11/1/2004
NVIDIA Deploys Synopsys' Magellan to Maximize Verification Productivity	10/27/2004
NVIDIA Adopts Synopsys' Physically Aware Test Solution for Latest Processor Designs	10/26/2004
Synopsys Galaxy Test Reduces Test Data Volume and Application Time at STMicroelectronics	10/26/2004
HHNEC Standardizes on Synopsys' Proteus OPC Software to Reduce Mask Synthesis Turn-Around-Time	10/18/2004
Synopsys Acquires Cascade, Completing PCI Express IP Portfolio	10/18/2004
Synopsys to Acquire Integrated Systems Engineering AG	10/11/2004
BAE Systems Uses Synopsys Galaxy Design Platform in Design of 24 Radiation-Hardened, Space-Qualified ASICs	10/4/2004
Microchip Technology Saves Weeks in Analog Design Time with Synopsys' Circuit Explorer	10/4/2004
Synopsys Design Compiler FPGA and Xilinx Virtex-4 FPGAs Target Complex ASIC Prototype Applications	9/29/2004
Atheros Communications Adopts Synopsys NanoSim for Wireless Chip Verification	9/20/2004
Synopsys and Photronics Collaborate to Improve Quality and Delivery Time of Advanced Photomasks	9/14/2004
Synopsys' Proteus OPC Software Adopted by NEC Electronics for 90-nm Production	9/14/2004
IPCore Technologies Adopts Synopsys Solution as Primary Design Flow	8/31/2004
Samsung Standardizes on Synopsys DesignWare USB IP	8/30/2004
Synopsys Introduces 90nm USB 2.0 On-The-Go PHY and Extends Its Hi-Speed USB PHY to 90nm Node	8/30/2004
Synopsys' DesignWare IP Core for PCI Express First to Pass PCI-SIG Compliance Tests	8/23/2004
Renesas Technology Selects Synopsys Star-RCXT for 90 Nanometer Designs	7/19/2004
Synopsys Provides Galaxy and Discovery Platforms to Korean Government Design Agency	6/29/2004
Oridus Integrates Its SpaceCruiser Web Collaboration Technology in the Synopsys Milkyway Design Database	6/28/2004
Synopsys Announces OpenMAST to Foster Open Model Exchange for Automotive and Aerospace Design Communities	6/28/2004
Synopsys Invests in HPL Technologies	6/23/2004
Synopsys and Virtio to Connect Hardware and Software Development Flows with Advanced ESL Solution	6/21/2004
Synopsys DesignWare IP Core for PCI Express Powers Realtek Single-Chip Gigabit Ethernet Solution	6/14/2004
Altera Collaborates With Synopsys on Hardcopy Structured ASICs	6/8/2004
Denali Joins Synopsys SystemVerilog Catalyst Program	6/7/2004
Synopsys' coreAssembler Tool Decreases Design Time and Reduces SOC Cost	6/7/2004
Synopsys Delivers Comprehensive Low-Power Solution 2X Power Reduction	6/7/2004
Synopsys Reduces AMBA Bus-Based SoC Design Time with DesignWare Library	6/7/2004
Synopsys, ARM Collaborate to Accelerate AMBA AXI Adoption with DesignWare Verification IP	6/7/2004
TSMC and Synopsys Address Design Challenges for 90 Nanometer and Below with TSMC Reference Flow 5.0	6/7/2004
Ansoft, Synopsys Collaborate to Provide IC/Package Co-Design and Analysis	6/3/2004
Synopsys HSPICE Advances Circuit Simulation Performance and Analysis	6/1/2004
Renesas Technology Adopts Synopsys' Jupiter XT Design Planning Flow for 90 Nanometer Designs	5/26/2004
Synopsys Announces National Semiconductor Standardizes on Synopsys VCS, Leda, and Formality	5/25/2004
Synopsys Extends VCS With Full-Featured Built-In Testbench Technology	5/25/2004
Synopsys Announces Galaxy and Discovery Platform Support for 90 Nanometer IBM and Chartered Processes	5/24/2004
Synopsys Delivers Galaxy 2004 with Significant Performance, Capacity and Yield Enhancement Features	5/17/2004
Synopsys and Philips Announce New Philips' CoolFlux DSP Core to be Distributed in Synopsys' DesignWare Library	5/11/2004
Synopsys' SiVL Silicon-Versus-Layout Verification Tool Enhancements Enable Faster Time-to-Yield	5/10/2004
UMC and Synopsys Develop Reference Flow for UMC's Advanced Deep Submicron Processes	5/3/2004
Toshiba Tapes Out Multiple 90-nm SoC Designs with Synopsys' Galaxy Design Platform	4/27/2004
NVIDIA Delivers Advanced Graphics Processor Designed Using Synopsys' Galaxy Design Platform	4/21/2004
Synopsys and ARM Team Up to Deliver System-Level Design Solution	4/21/2004
Synopsys Terminates Merger Agreement with MoSys	4/19/2004
Synopsys and TSMC to Optimize RTL-to-Wafer Design Process	4/13/2004
Synopsys Galaxy Test Solution Sets New Benchmark in Performance and Quality for Deep Submicron Designs	4/12/2004
MIPS Technologies and Synopsys Announce Galaxy Reference Flow for 24K Core Family	4/5/2004
Synopsys' Star-RCXT Validated on UMC's 90 Nanometer Processes	3/30/2004
Synopsys and Jungo Collaborate to Offer Complete USB Full Speed OTG Solution With IP and Software	3/23/2004
Synopsys Opens Expanded Shanghai Office and R&D Center	3/23/2004
AccelChip to Offer Immediate Support of Design Compiler, Design Compiler FPGA Flows	3/16/2004
iRoC Sells Memory BIST Division to Synopsys	3/15/2004
Synopsys and HHNEC Jointly Deliver Reference Design Flow	3/15/2004
Synopsys Offers New FPGA Synthesis Product	3/15/2004
TSMC Certifies Synopsys' Star-RCXT for 90-nm Designs	3/2/2004
Honeywell and Synopsys to Codevelop Design Flow for Next-Generation Radiation-Hardened ICs	3/1/2004
Synopsys' Proteus Optical Proximity Correction Software Delivers Near Linear Performance Increase Using 1000 Intel Xeon Processors	2/23/2004
Synopsys to Acquire Monolithic System Technology (MoSys) and Accelerant Networks	2/23/2004
ARM and Synopsys to Deliver Industry's First Reference Verification Methodology Based on SystemVerilog	2/16/2004
Sandwork Joins Synopsys in-Sync Program for Verification of Analog and Mixed-Signal Designs	2/11/2004
Synopsys' Primetime Achieves New Levels of Static Timing Analysis Performance for 90-Nanometer Designs	2/11/2004
Synopsys to Distribute TSMC'S Libraries Through DesignWare Library	2/9/2004
Toshiba Licenses Synopsys PSM Technology for 65 nm Process	2/2/2004
Synopsys Agrees to Acquire Analog Design Automation	1/28/2004
Synopsys and ATI Technologies Sign Long-Term Access Agreement For Synopsys Design and Verification Technology	1/28/2004
Synopsys Enhances Testbench Performance and Productivity with Vera 6.2	1/26/2004

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VMM Application Packages: The Next Level of Productivity	2/21/2008
Three Verification Improvements Boost Functional Coverage	2/20/2008
Applying Constrained-Random Verification to Microprocessors	12/10/2007
Power-Sensitive 65-nm Designs Increase the Need for Transistor-Level Verification	8/27/2007
IC Design at Advanced Process Nodes: Add Flex to Your Flow	8/16/2007
Practical Power Network Synthesis for Power-Gating Designs	6/5/2007
Measuring Scan Compression Performance	5/21/2007
Analog and Mixed-Signal Connectivity IP at 65nm and Below	5/7/2007
Model-Based Metal Fill Optimizes Planarization and Increases Yield	3/22/2007
How to Use Composite Current Source Modeling for Crosstalk Noise Analysis	3/9/2007
Partial Reluctance Extraction	11/13/2006
Test Methods Identify Small Delay Defects	10/30/2006
Metrics Measure IC Design Productivity	10/16/2006
SystemVerilog Reference Verification Methodology: VMM Adoption	9/4/2006
SystemVerilog Reference Verification Methodology: ESL	6/12/2006
SystemVerilog Reference Verification Methodology: RTL	5/1/2006
SystemVerilog Reference Verification Methodology: Introduction	3/27/2006
How Much Test Compression is Enough?	2/20/2006
Dual Threshold Voltages and Power-Gating Design Flows Offer Good Results	2/2/2006
Rail-Signoff Analysis Ensures SoC Power Integrity	1/19/2006
Critical Area Optimizations Improve IC Yields	1/9/2006
The History and Future of Scan Design	9/19/2005
SOI Eases Radiation-Hardened ASIC Designs	7/25/2005
Try A Hybrid Flow To Overcome Hierarchical Design Limitations	7/7/2005
Start at the Top to Reduce Re-Spins for Analog-Digital Chips	6/1/2005
What Designers Need to Know About TCAD	4/4/2005
Coverage Is the Heart of Verification	2/14/2005
Mixed-Level Modeling Allows IC Virtual Prototypes	12/16/2004
Accurate Power-Analysis Techniques Support Smart SOC-Design Choices	12/7/2004
How to Evaluate Test Compression Methods	10/7/2004
How Power-Aware Test Improves Reliability and Yield	9/15/2004
Hot chips? ... Not! Efficient Power Management in the 90-nm Foundry Reference Flow	9/1/2004
A Scalable Approach to Speeding Physical Verification	7/21/2004
Delivering Verified AMBA AXI Systems-on-Chips	7/12/2004
Design-Planning Guidelines Prevent Chip Surprises	2/5/2004
How SystemVerilog Aids Design and Synthesis	1/27/2004
Modeling In-die Process variation with Accuracy	1/15/2004
"Best practices" Improve Hierarchical Design Constraints	12/1/2003
Verification IP Adapts to SoC Complexity	7/18/2003
Design for Verification Methodology Allows Silicon Success	4/18/2003
Shifting from Functional to Structured Techniques Improves Test Quality	3/10/2003
Interoperable Tools Ease Equivalence Checking	2/3/2003
New Approach Moves Logic BIST Into Mainstream	10/14/2002
Smart Verification Moves Beyond SystemVerilog 3.0	9/27/2002
The IP Story: From Shaky Start to Bright Future	7/1/2002
Static Crosstalk Analysis Assures Silicon Success	6/5/2002
SoC/IP Designs Need Next-Gen Solutions for Integration Verification	5/28/2002
OpenVera 2.0 Assertions Empower Verification	4/10/2002
Platform Flow Puts Chip in Context Early	4/2/2002
Reconfigurable Scan Lowers Test Costs	3/29/2002

Tutorials, White Papers, Conference Papers, etc.

A Survival Guide for Selecting High-Quality IP

Accelerating Functional Closure: Synopsys Verification Solutions

Advanced Stimulus Generation with DesignWare Verification IP and Verification Methodology Manual for SystemVerilog

Advanced Techniques for Building Robust Testbenches with DesignWare Verification IP and Verification Methodology Manual (VMM) for SystemVerilog

Benefits and Applications of the Wireless USB WHCI Host and Dual-Role Device

Beyond DDR2 400: Physical Implementation Challenges in Your SoC Design

Building a Total Quality Experience into Silicon IP: Delivering DesignWare Silicon IP into SoC Designs

Coding Guidelines for Datapath Synthesis

DDR SDRAM: A Low Cost, Yet Increasingly Complex Off-Chip Memory Solution for SoCs

Designing Using the AMBA 3 AXI Protocol

Embedded DDR Interfaces: Ten Tips to Success for Your SoC

Enabling Rapid Adoption of the AMBA 3 AXI Protocol-based Design with Synopsys DesignWare IP

Favorable Economics Will Drive Rapid Adoption of Certified Wireless USB

Five Vital Steps to a Robust Testbench with DesignWare Verification IP and Verification Methodology Manual (VMM) for SystemVerilog

Hi-Fi Audio: Unveiling the Hidden dBs

High Performance Connectivity IP: Avoiding Pitfalls when Selecting an IP Vendor

How a Complete IP Solution Speeds Time-to-Market and Reduces Risk for 10-Gigabit Ethernet Applications

How System-Level Trade-Offs Drive Data Converter Decisions

Implementing Floating-Point IP for the Right Accuracy and Quality of Results (QoR)

Implementing Physical Layer Connectivity IP in Deep Sub-Micron Technologies

Integrating a PCI Express Digital IP Core into a Gigabit Ethernet Controller

IP Solutions for Synchronizing Signals that Cross Clock Domains

Life Begins at 65 – Unless You Are Mixed-Signal?

Low-Power USB 2.0 PHY IP for High-Volume Consumer Applications

Meeting Timing Budgets for DDR Memory Interfaces

Reduce Power, Area and Routing Congestion: Analysis of a High-Performance On-Chip-Bus Interconnect

Reducing AMBA-based SoC Design Time by More Than 50% Using coreAssembler

Reverse Disaggregation: How Silicon IP Will Change the Semiconductor Supply Chain

Solving the Integration Challenges for USB-Enabled Designs

The Good? The Bad? The Ugly? IP Perspectives from Vendor to SoC Integrator

Understanding the Fundamentals of PCI Express

Application Notes

DesignWare SATA AHCI Host Controller: Understanding Multi-Port Configuration and Performance

Webcasts
Tips for Embedding Flexible Analog Interface IP into Digital SoCs for Broadband Communications	9/9/2010
Manufacturing-Aware Routing at 32 and 28nm	8/11/2010
Accurate Power Analysis of Low-Power Techniques Using PrimeTime PX	8/3/2010
Realizing Today's 32nm and Beyond Large-Capacity Designs	7/28/2010
Fast 3D Field Solver Extraction with StarRC Custom Rapid3D Technology	7/27/2010
Understanding PCI Express 3.0 and How to Implement the New Features	5/25/2010
Shaping the Perfect Audio Codec: How Your SOC Can Benefit from the Right Audio Functions' Line-Ups	4/13/2010
Complementing Emulation with Rapid Prototyping	3/31/2010
The Big Design Squeeze: How to Get Faster Design Turns In FPGA-Based Designs	3/3/2010
Low-Power Architecture Exploration for ASIC Algorithm Implementation	1/19/2010
Reduce Energy Consumption for Datapath Designs	9/22/2009
Boosting Yield and Increasing Quality with Power-Aware Test and Small Delay Defect Testing	8/5/2009
Faster Power/Ground Grid Closure with In-Design Rail Analysis	6/25/2009
Achieving Predictable Success in FPGA Design	6/18/2009
Improving RTL-to-GDSII Design Efficiency with Lynx Design System	6/3/2009
SuperSpeed Your SoC with USB 3.0	4/22/2009
Virtualization of PCI Express I/O Devices	1/28/2009
Buying Time: Using Signal Integrity and Common Sense to Meet Timing Margins for High-Speed Memory Interfaces	10/15/2008
Decoding the Real Low Power Benefits of DDR for Embedded Applications	10/1/2008
Avoiding the Landmines when Using a DDR Interface on Your Next SOC	9/16/2008
Building a VMM-Based Constrained Random Environment for Bus Protocol Verification	7/15/2008
Selecting the Optimal Embedded Memory IP Architecture	5/1/2008
Building a Configurable Gigabit Ethernet Subsystem for Complex SOCs	12/19/2007
Connecting to DDR2: Mitigating High-Speed Challenges in SOC Designs	7/25/2007
High-Speed Serial Interface Testing: Solving the Analog Test Problem with a Digital Solution	7/12/2007
The Complete USB 2.0 IP Solution	6/27/2007
SystemVerilog for e Experts: Understanding the Migration Process	7/20/2006
Building a Bridge to PCI Express: A Case Study using AXI	6/28/2006
Nanometer Solutions for Analog and Digital Designs	12/6/2005

EDA Tools
Paramos	Design for Manufacture
Seismos	Design for Manufacture
BSD Compiler	Design for Test
TetraMAX ATPG	Design for Test
PrimeRail	Power Analysis
Astro-Rail	Uncategorized
Aurora	Uncategorized
Cadabra	Uncategorized
CATS	Uncategorized
Circuit Explorer	Uncategorized
CosmosLE	Uncategorized
CosmosScope	Uncategorized
DC Ultra	Uncategorized
Design Compiler	Uncategorized
Design Compiler FPGA	Uncategorized
DesignWare Intellectual Property	Uncategorized
Encore	Uncategorized
Enterprise	Uncategorized
ESP	Uncategorized
Floorplan Compiler	Uncategorized
Formality	Uncategorized
Hercules	Uncategorized
HSPICE	Uncategorized
IP Explorer	Uncategorized
i-Virtual Stepper	Uncategorized
LEDA Programmable Checker	Uncategorized
Libra-Passport	Uncategorized
Libra-Passport Library	Uncategorized
Library Compiler	Uncategorized
Libra-Visa 0.18-micron Chartered library	Uncategorized
Magellan	Uncategorized
Milkyway	Uncategorized
NanoSim	Uncategorized
PrimeTime SI	Uncategorized
PrimeTime: Static Timing Analysis	Uncategorized
Proteus, Progen, Prospector Full-Chip Optical Proximity Correction	Uncategorized
RailMill	Uncategorized
SiVL-LRC - Silicon vs. Layout Verification System	Uncategorized
Star-MTB	Uncategorized
Star-RCXT	Uncategorized
System Studio	Uncategorized
Taurus-WorkBench	Uncategorized
Vera	Uncategorized
Virtual Stepper	Uncategorized

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