March 20, 2012 -- Integrating audio IP that has been silicon-proven and optimized for specific audio functions helps reduce power, area, and cost in today's multimedia system-on-chips (SOCs). As next-generation designs migrate to 28-nm process technologies however, new integration challenges arise. Audio functionality that exists in audio codecs consists mainly of analog circuitry, which does not scale with process technology, and, therefore, does not follow the traditional Moore's Law.
System architects and SOC designers need to take into consideration how the increased wafer pricing of 28-nm process technologies impacts the economics of incorporating audio codecs into advanced SOCs. Synopsys has performed testing on several mobile multimedia devices available in the market today, finding that most current models of smartphones and tablets can be supported with audio codecs developed in 28-nm.
This article presents the test results and discusses the business and technical challenges of integrating audio functionality into a 28-nm mobile multimedia SOC, while also offering insight on how to overcome those challenges. Some key design considerations are also explained, including scaling limitations, supply voltage requirements and system partitioning options.
By Carlos Azeredo-Leme and Craig Zajac. (Azeredo-Leme is a senior staff engineer for the DesignWare Analog IP at Synopsys, Inc. and Zajac is the Senior Product Marketing Manager for the non-volatile memory IP, analog audio IP and video analog front-end IP product lines at Synopsys.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the EE Times Audio Designline website.
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