May 22, 2012 -- OCP International Partnership (OCP-IP) has announced the availability of an enhanced version of its Transaction Generator (TG), which is a transaction level (TL) SystemC simulator for benchmarking network-on-chips (NoCs) used in multiprocessor system-on-chip (SOC) applications. The latest version now includes eight new traffic models from Hong Kong University's MCSL Benchmark Suite v1.1.

MCSL includes two kinds of traffic patterns: recorded and statistical. Both use a task-communication graph model which is converted into TG's native format automatically before simulation. These models are fine-grained having dozens or even hundreds of tasks and hence are suitable for benchmarking large systems. The default mappings utilize 16, 32 and 64 processing elements. Applications include, video processing, robot controller, and more.

In addition to the eight new models from Hong Kong University, the TG also includes a basic set of nine traffic models from the multimedia and telecommunication domain, as well as Accurate DRAM Models. Together, these integrated models enable accurate representation of performance of systems and enable a realistic evaluation of NoCs.

The new TG is freely available to both OCP-IP members and non-members alike through GNU LGPL, and is an ideal addition to all system-level designers evaluating various interconnection solutions in a simulation model of a real, complex system. It can also be used to simulate IP blocks before real implementations are available which enables the design of interconnect and implementation of IP blocks and software for processors to advance in parallel, saving time, resources, and ensuring a faster time-to-market.

"The work on this Transaction Generator, eight new models from Hong Kong University and DRAM package by our Network on Chip Working Group showcases co-operation and collaboration among both our industry and academic researchers, ensuring synergy advantages in the field of NoCs," said Ian Mackintosh, President and chairman of OCP-IP.

The Transaction Generator with DRAM model kit and eight new models from Hong Kong University were developed by Tampere University of Technology and Royal Institute of Technology (KTH) in conjunction with members of OCP-IP's Network on Chip Benchmarking working group including: Boston University, University of British Columbia, Carnegie Melon University, Washington State University, and Transylvania University in cooperation with industry members of the OCP-IP.

Go to the OCP-IP website to download a copy of the Transaction Generator.

The Network on Chip Benchmarking Working Group has also issued an open call for Benchmarks to be distributed to researchers. NoC researchers may submit benchmarks from any application domain to be included.