June 4, 2012 -- Invarian Inc. is adding 3D thermal and 3D mechanical stress to its physical sign-off tools. The InVar 3D Frontier Thermal tool is designed for true 3D-analysis which is especially important in stacked die applications. Along with the increasing need for analyzing thermal issues is the need to adhere to proper mechanical stress issues. InVar Mechanical Stress works in conjunction with the company's thermal tools to ensure a total solution encompassing the chip, the package and the entire 3D-environment.

The InVar 3D Thermal tool works within standard flows using an adaptive engine able to capture a thermal profile within minutes of actual run-time. The thermal analysis tool is accurate because it integrates into an overall concurrent engine that analyzes not only the thermal aspects, but also the timing, power, and voltage on a continuous basis. The engine runs on a parallel architecture and scales with the computing environment.

Validation becomes increasingly important and problematic as processes scale below 28nm because they not only scale by reducing gate-channels but also with the introduction of 3D devices. Add to this the additional thermal and mechanical stress from the arrangement of a tighter package density due to stacked die and their associated vias and interconnect, designers enter a new realm where thermal and mechanical stress analysis early in the design flow become important.

The tools employ debug features and what-if capabilities to find-and-fix errors quickly and efficiently. The ability to scale to very large designs without sacrificing accuracy or suffering long run-times is achieved through the architecture of the tool itself.

Invarian, Inc. develops and markets software and intellectual property for electronic design automation, enabling IC designers to meet critical time-to-market objectives by delivering physical sign-off solutions that reduce re-spins and helps to get products to market faster. The Invarian sign-off analysis for analog, digital and mixed signal integrated circuits identifies post-manufacturing failures before tape-out, reducing costly re-spins.