June 11, 2012 -- Research in 3D integration has attracted researchers from industries as well as academics due to its superior benefits over 2D architecture such as better performance, lower power consumption, small form factor and support for heterogeneous technology integration. In this article, we discuss the research work on 3D integration, particularly its benefits when compared with CMOS scaling going to sub-nanometer process technology. We also describe several 3D architecture implementations previously developed to justify the need of our 3D experimental implementation which is currently being developed based on a long collaboration between ENSTA and GIPSA-Lab on multimedia MPSoC design.
By M. H. Jabbar and D. Houzet. (The authors are with GIPSA Lab, Grenoble INP, France.)
This brief introduction has been excerpted from the original copyrighted article.