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SMIC and Brite Semiconductor's 40LL Dual-Core ARM Cortex-A9 Test-Chip Achieves 1.3GHz  
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June 20, 2012 -- The Semiconductor Manufacturing International Corp. (SMIC), and Brite Semiconductor Corp. today jointly announced that their dual-core ARM Cortex-A9 MPCore processor-based chip, adopting SMIC's 40-nm LL (low-leakage) process technology, has achieved a clock rate of 1.3GHz in silicon tests.

The test chip incorporates a 32-kByte I-Cache and a 32-kByte D-Cache, memory compiler modules, ARM NEON technology, and ARM CoreSight debug and trace technology, as well as built-in SRAM, DMA, NOR Flash, SDRAM, and VGA interfaces integrated through AMBA AXI on the test-chip. In addition to the high-speed standard cell library, the test-chip also incorporates SMIC's customized high-speed memory and cell library for performance enhancement (SMIC Performance Enhancement Kit).

"The ARM Cortex-A9 dual-core test-chip performance has met our expectations, proving Brite Semiconductor has the solid technical foundation needed to meet industry demand. The next Cortex-A9 dual-core chip that will soon tape out will achieve higher performance," said Dr. Charlie Zhi, President and Chief Executive Officer of Brite Semiconductor.

"This milestone from the ongoing collaboration between Brite, SMIC and ARM is a great example of how collaboration drives innovation in the development of core technology for the next generation of smart, connected devices," said Allen Wu, President, ARM China.



Go to the Brite Semiconductor Corp. website to find additional information.

Read more about
Brite Semiconductor Corp.
and
Semiconductor Manufacturing International Corp. (SMIC)
on SOCcentral.com


Keywords: ASICs, ASIC design, ARM-based microprocessors, MPUs, IP, intellectual property, cores, multicore processors, multi-core processors, Semiconductor Manufacturing International Corp. (SMIC), Brite Semiconductor
601/38721 6/20/2012 470 67


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