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Xylon Announces logiI2C Master Controller IP Core for Xilinx FPGAs  
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July 9, 2012 -- The new logiI2C Bus Master Controller IP core from the Xylon logicBRICKS IP library supports single-master I2C communications and enables bug-free data transfers. It is ARM AMBA AXI4-Lite bus-compliant, and can be implemented in all Xilinx, Inc. programmable devices, including the 7 series FPGA families and the Zynq-7000 EPP.

Xylon delivers the logiI2C IP core in a format which is fully compatible with Xilinx Platform Studio (XPS), and the software driver compatible for use within Xilinx Software Development Kit (SDK).

Availability and Pricing

The IP core is available now. License fees offered through Xylon's Low-Volume IP Program (LVIP) start at under $1,050.

Posted by: John Miklosz



Go to the Xylon website for details.

E-mail Xylon for more information.

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Keywords: FPGAs, field programmable gate arrays, FPGA design, logiI2C IP, intellectual property, cores, Xylon, Xilinx,
601/38818 7/9/2012 457 74


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