September 18, 2012 -- Triad Semiconductor, Inc. has unveiled a new low-cost mixed-signal semi-custom ASIC design environment called ViaDesigner. The ViaDesigner EDA software is a Windows-PC design environment that enables systems engineers to design their own semi-custom ASICs without the need for in-depth IC design know-how.

The ViaDesigner software is a complete mixed-signal design and simulation environment that includes schematic capture, VHDL, Verilog, and VHDL-AMS design entry and mixed-mode simulation. The design and analysis process is simplified and accelerated through the use of wizards that help the engineer to create sophisticated analog and mixed-signal functions without getting bogged down in low-level, full-custom IC-layout details. The current list of wizards available in ViaDesigner include: operational amplifier, integrator, filter, analog to digital converter, digital-to-analog converter, sigma-delta modulator, resistor, capacitor, analog multiplexer, analog switches, voltage reference, configurable I/O pads, power-on-reset, and a comparator wizard.

In a traditional full-custom ASIC development, the creation of a sigma-delta modulator is a tedious and lengthy task of manually sizing full-custom devices and laying them out by hand. In ViaDesigner, the user places a sigma-delta modulator wizard symbol on the schematic, launches the configuration wizard, picks the order of the modulator and clocking details, and ViaDesigner automatically generates the modulator and corresponding VHDL-AMS model for simulation.

"A -based simulation offers excellent simulation fidelity and speed improvement compared to a low-level Spice simulation." stated Reid Wender Vice President of Marketing and Technical Sales at Triad Semiconductor. "Using Spice a single conversion cycle of a sigma-delta ADC simulation can take close to two days while the same VHDL-AMS simulation in ViaDesigner can be accomplished in less than two minutes."

Because traditional ASICs are too expensive, time consuming and risky for consideration in all but the highest volume projects these days, Triad provides a unique and patented semi-custom ASIC called a ViaASIC. These ViaASICs contain silicon-proven analog and digital resources that are overlaid with a patented global routing fabric. Triad's mixed-signal-aware place-and-route tool, ViaPath, places vias in this routing fabric to configure and interconnect resources to implement a designer's circuit. Only this single via mask layer is sent to the foundry for processing against staged wafers.

Triad's ViaASIC approach radically reduces development costs (up to 80%), reduces develop times from 18 months down to 3 to 5 months, and provides for major risk mitigation compared to a traditional ASIC development. And, since Triad's development costs are so much lower than the old fashioned way of making ASICs, Triad does not need the customer to commit to large production volumes. ViaASICs are attractive solutions for volumes from thousands to millions.

Posted by: John Miklosz