December 19, 2003 -- High data-rate applications like Gigabit Ethernet, Infiniband, PCI Express, Fibre Channel and Serial ATA continue to drive system bandwidth to higher and higher levels, creating the need for high performance interconnect for line cards, chip-to-chip paths and switch fabrics. However, this higher speed performance comes at a price: signal integrity becomes a significant portion of the design effort and includes contributions from not only the ASIC, but the package and the printed circuit board (PCB) as well. Without careful design practices, program delays and rework will be inevitable. Time to market will also be impacted, which could lead to lost revenue.
High speed signaling has fast rise and fall times. This means that all loads must be treated as transmission lines rather than simple lumped models, which makes the analysis of the system more complex. PCB layout is more critical than ever, and ASIC tool flows have added signal integrity checking to their arsenals to help ensure a high quality product. But ensuring signal integrity on a few carefully placed high speed lines will pay dividends in a higher throughput, more compact system with state-of-the-art capability.
By David Chase. (Chase is a Field Applications Engineer supporting High Speed Interfaces for LSI Logic Corp.)
This brief introduction has been excerpted from the original copyrighted article.
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