The input impedance of finite utility plane structures is
calculated accurately from the simulated package resonance
data using a commercial signal integrity tool. The effect of the
equivalent circuit parasitics of the utility planes and their
contributions to power integrity are simulated on both, digital
and high-speed sections for the same die and package
footprint on three different package substrate technologies. In
addition, the effective loop inductance and package substrate
DC resistance is also calculated from the package input
impedance at low frequency range. These results are used to
discuss the intrinsic relationships between the physical
package structure such as: stackup, utility plane shapes and
via types to identify and minimize the potential sources of
package utility plane noise for critical applications.
Access the entire document on the Sigrity, Inc. website.
