August 06, 2004 -- As nanometer process technologies invade the world of communications system designers, a number of increasingly exhibited effects impact and require advanced modeling support. In the timing domain, cell delays are shrinking while the stable operating regions for these cells are getting tighter. Power modeling must capture and convey the increasing leakage currents and increasing number of hidden power sources the suck the life out of batteries and degrade the lifespan of circuits.
Dropping voltages are one way to save power supply, but that leads to a greater sensitivity to rail voltage variations and smaller margins for switching noise. Sources of switching noise are increasing with the increased capacitive cross-coupling due to tighter line dimensions and the relative increase in sidewall capacitance.
By Robert Jones. (Jones is director of strategic marketing for the Silicon Correlation Division at Magma Design Automation, Inc.)
This brief introduction has been excerpted from the original copyrighted article.
