| Tutorials, White Papers, Application Notes, etc. |
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The Internet is very much like the Metropolitan Museum of Art; what you see on display is only a small fraction of what's hidden in the bowels of the basement. To find the "treasures" hidden in the bowels of EDA tool and IP vendors' "basements," SOCcentral.com drills down into their websites and to seperate the tutorials, white papers, and generic app notes from the marketing hype and product brochures.
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Know of a white paper or app note that would interest SOCcentral.com visitors?
If you do, we'd like to know about it! If it meets our criteria, we'll add an abstract to our database and provide the appropriate link to the white paper or app note. Please send your recommendations to directory_editor@soccentral.com. | |
Recommended Tutorials, White Papers, etc.On-Chip Communications Network Report (Sonics, Inc.)This report covers the results of an independent, blind worldwide survey covering on-chip communications networks (OCCN), defined as is the entire interconnect fabric for SOCs. The survey was executed in October 2012, with 318 design and verification professionals participating. . . . read more The SoC Interconnect Verification Challenge (Test and Verification Solutions, Ltd. (TVS))With increasing numbers of CPU cores, multimedia subsystems and communication IPs in today's system-on-chips, the main SOC interconnects, crossbars or networks-on-chip fabrics become key components of the system. In addition, IP reuse and network-on-chip (NoC) generation solutions have enabled the conception of new SoC architectures within a few months if not only weeks. . . . read more VHDL PaceMaker Interactive Tutorial (Doulos, Ltd.)VHDL PaceMaker is a self-teach tutorial that gives you a great foundation in the basics of the VHDL language. VHDL PaceMaker is ideally suited to self-paced learning prior to attending full-scope instructor-led VHDL training. As well as serving as an introductory tutorial, VHDL PaceMaker, with its interactive hyperlinks, provides an excellent interactive reference tool for the VHDL designer. It includes a full syntax reference, a glossary of technical terms, and the ability for you to annotate your own notes. . . . read more Design-for-Test Guidelines (Corelis, Inc.)In today's fast-paced environment with short time-to-market requirements, it has become increasingly important to design products that allow for early fault and failure detection. The earlier a mistake or a defect can be detected in the design phase or in the production process, the less money it will cost to remedy it and the sooner the product will be ready for production or shipment. Therefore, a good design-for-test (DFT) strategy is needed for the design, prototype and production phase of a product. . . . read more Variation-Aware Custom IC Design Report 2011 (Solido Design Automation, Inc.)This report covers the results of an independent worldwide custom IC design survey. The survey was executed in late 2010, with 486 IC design professionals participating. . . . read more FPGA Design Tutorial (1-CORE Technologies)This FPGA design tutorial covers various issues in the fields of FPGA design, simulation and synthesis. It is targeted towards both beginners and experienced FPGA designers. . . . read more
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Selecting a specific Category will generate an alphabetical listing* of ALL the entries in that Category.
* SOCcentral's Sponsors' white papers, app notes, etc. are listed first.
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Suggested Tutorials, White Papers, etc.
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Tutorials, White Papers, etc. abstracted since Saturday, December 08, 2012A Dictionary of MEMS and MEMS-related Terminology (SOCcentral) Introduction to Microelectromechnical Systems (MEMS) (SOCcentral) Functional Test on I2C and SPI System Monitors with JTAG (ASSET InterTech, Inc.) Best Practices for Maximizing IP Reuse in SOC, IC and FPGA Design (IC Manage, Inc.) Global Design Management Report 2012 (IC Manage, Inc.) IC Design Management Best Practices (IC Manage, Inc.) IP Reuse: Design and Verification Report 2013 (IC Manage, Inc.) Unifying Bug Tracking with Design-Data Management (IC Manage, Inc.) Using IC Manage GDP for Collaborative Custom IC (Virtuoso) and Digital SOC Design (IC Manage, Inc.) Who's Managing Your Power Management? (JVD, Inc.) CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs (Carnegie Mellon Electrical & Computer Engineering) CoRAM: An In-Fabric Memory Architecture for FPGA-based Computing (Carnegie Mellon Electrical & Computer Engineering) C-To-CoRAM: Compiling Perfect Loop Nests to the Portable CoRAM Abstraction (Carnegie Mellon Electrical & Computer Engineering) Prototype and Evaluation of the CoRAM Memory Architecture for FPGA-based Computing (Carnegie Mellon Electrical & Computer Engineering) Single-chip Heterogeneous Computing: Does the Future include Custom Logic, FPGAs, and GPUs? (Carnegie Mellon Electrical & Computer Engineering) On-Chip Communications Network Report (Sonics, Inc.) The SoC Interconnect Verification Challenge (Test and Verification Solutions, Ltd. (TVS))
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The Many Faces of Low-Power Verification
 Ghislain Kaiser CEO, Docea Power
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 Warren Savage CEO, IPextreme
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So, Just What Is ESL
 Barbara Tuck Senior Editor, SOCcentral
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