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 Category: Tutorials, White Papers, App Notes, etc.: Saturday, March 28, 2015
 Tutorials, White Papers, Application Notes, etc.

The Internet is very much like the Metropolitan Museum of Art; what you see on display is only a small fraction of what's hidden in the bowels of the basement. To find the "treasures" hidden in the bowels of EDA tool and IP vendors' "basements," SOCcentral drills down into their websites to seperate the tutorials, white papers, and generic app notes from the marketing hype and product brochures.

Know of a white paper or app note that would interest SOCcentral.com visitors?

If you do, we'd like to know about it! If it meets our criteria, we'll add an abstract to our database and provide the appropriate link to the white paper or app note. Please send your recommendations to directory_editor@soccentral.com.


Recommended Tutorials, White Papers, etc.

On-Chip Communications Network Report (Sonics, Inc.)

This report covers the results of an independent, blind worldwide survey covering on-chip communications networks (OCCN), defined as is the entire interconnect fabric for SOCs. The survey was executed in October 2012, with 318 design and verification professionals participating. . . . read more

The SoC Interconnect Verification Challenge (Test and Verification Solutions, Ltd. (TVS))

With increasing numbers of CPU cores, multimedia subsystems and communication IPs in today's system-on-chips, the main SOC interconnects, crossbars or networks-on-chip fabrics become key components of the system. In addition, IP reuse and network-on-chip (NoC) generation solutions have enabled the conception of new SoC architectures within a few months if not only weeks. . . . read more

VHDL PaceMaker Interactive Tutorial (Doulos, Ltd.)

VHDL PaceMaker is a self-teach tutorial that gives you a great foundation in the basics of the VHDL language. VHDL PaceMaker is ideally suited to self-paced learning prior to attending full-scope instructor-led VHDL training. As well as serving as an introductory tutorial, VHDL PaceMaker, with its interactive hyperlinks, provides an excellent interactive reference tool for the VHDL designer. It includes a full syntax reference, a glossary of technical terms, and the ability for you to annotate your own notes. . . . read more

Design-for-Test Guidelines (Corelis, Inc.)

In today's fast-paced environment with short time-to-market requirements, it has become increasingly important to design products that allow for early fault and failure detection. The earlier a mistake or a defect can be detected in the design phase or in the production process, the less money it will cost to remedy it and the sooner the product will be ready for production or shipment. Therefore, a good design-for-test (DFT) strategy is needed for the design, prototype and production phase of a product. . . . read more

Variation-Aware Custom IC Design Report 2011 (Solido Design Automation, Inc.)

This report covers the results of an independent worldwide custom IC design survey. The survey was executed in late 2010, with 486 IC design professionals participating. . . . read more

FPGA Design Tutorial (1-CORE Technologies)

This FPGA design tutorial covers various issues in the fields of FPGA design, simulation and synthesis. It is targeted towards both beginners and experienced FPGA designers. . . . read more

What's the difference between Tutorials, White Papers, and App Notes?

 
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Selecting a specific Category will generate an alphabetical listing* of ALL the entries in that Category.

* SOCcentral's Sponsors' white papers, app notes, etc. are listed first.


10 Most-Read White Papers
Archipelago: An Open Source FPGA with Toolflow Support

Most-Read Recent News (updated daily)
TI Announces Fully Programmable MEMS Chipset for Embedded Ultramobile Near-Infrared Analysis
Alma Technologies Announces Availability of a New Ultra-High-Throughput JPEG Encoder IP Core
XMOS Multi-Core Microcontrollers Enable Gigabit Ethernet Internet of Things for Under $5
Xilinx Announces SDSoC Development Environment for All Programmable SoCs and MPSoCs
Synopsys' IC Compiler II Enables Toshiba's Tape-Out of Complex 40-nm SOC
PLDA and Analog Bits Partner to Provide a Silicon-proven PCIe Solution for Leading 28-nm Low-Power Process
Accellera Systems Initiative UVM 1.2 Proceeds to IEEE Standardization
Freescale Speeds SOC Implementation Time by 7X with Cadence Innovus Implementation System
Cadence Introduces Innovus Implementation System, Delivering Best-in-Class Results with Up to 10X Reduction in Turnaround Time
Latest Synopsys Virtualizer Release Accelerates VDK Performance Up to 5X for Early Software Development

Suggested Tutorials, White Papers, etc.


Tutorials, White Papers, etc. abstracted since Saturday, October 11, 2014

A Cooperative Simulation Formal Methodology: Target Verification with Both Barrels (Test and Verification Solutions, Ltd. (TVS))

Applying Agile Techniques to FPGA Development (Test and Verification Solutions, Ltd. (TVS))

Can We Train Our Designers to Avoid Bugs? (Test and Verification Solutions, Ltd. (TVS))

Continuous Integration for FPGA Design and Verification (Test and Verification Solutions, Ltd. (TVS))

FPGA-based Prototyping Tackling Large Designs Earlier (Test and Verification Solutions, Ltd. (TVS))

Predictable Verification Productivity (Test and Verification Solutions, Ltd. (TVS))

Reducing the Cost of FPGA/ASIC Verification with MATLAB and Simulink (Test and Verification Solutions, Ltd. (TVS))

Requirements-Driven Verification for Compliance (Test and Verification Solutions, Ltd. (TVS))

SystemC-based UVM Verification Infrastructure (Test and Verification Solutions, Ltd. (TVS))

Verification IP Trends and Technology for FPGA and ASIC Design Verification (Test and Verification Solutions, Ltd. (TVS))

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