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 Category: Tutorials, White Papers, App Notes, etc.: Wednesday, October 01, 2014
 Tutorials, White Papers, Application Notes, etc.

The Internet is very much like the Metropolitan Museum of Art; what you see on display is only a small fraction of what's hidden in the bowels of the basement. To find the "treasures" hidden in the bowels of EDA tool and IP vendors' "basements," SOCcentral drills down into their websites to seperate the tutorials, white papers, and generic app notes from the marketing hype and product brochures.

Know of a white paper or app note that would interest SOCcentral.com visitors?

If you do, we'd like to know about it! If it meets our criteria, we'll add an abstract to our database and provide the appropriate link to the white paper or app note. Please send your recommendations to directory_editor@soccentral.com.


Recommended Tutorials, White Papers, etc.

On-Chip Communications Network Report (Sonics, Inc.)

This report covers the results of an independent, blind worldwide survey covering on-chip communications networks (OCCN), defined as is the entire interconnect fabric for SOCs. The survey was executed in October 2012, with 318 design and verification professionals participating. . . . read more

The SoC Interconnect Verification Challenge (Test and Verification Solutions, Ltd. (TVS))

With increasing numbers of CPU cores, multimedia subsystems and communication IPs in today's system-on-chips, the main SOC interconnects, crossbars or networks-on-chip fabrics become key components of the system. In addition, IP reuse and network-on-chip (NoC) generation solutions have enabled the conception of new SoC architectures within a few months if not only weeks. . . . read more

VHDL PaceMaker Interactive Tutorial (Doulos, Ltd.)

VHDL PaceMaker is a self-teach tutorial that gives you a great foundation in the basics of the VHDL language. VHDL PaceMaker is ideally suited to self-paced learning prior to attending full-scope instructor-led VHDL training. As well as serving as an introductory tutorial, VHDL PaceMaker, with its interactive hyperlinks, provides an excellent interactive reference tool for the VHDL designer. It includes a full syntax reference, a glossary of technical terms, and the ability for you to annotate your own notes. . . . read more

Design-for-Test Guidelines (Corelis, Inc.)

In today's fast-paced environment with short time-to-market requirements, it has become increasingly important to design products that allow for early fault and failure detection. The earlier a mistake or a defect can be detected in the design phase or in the production process, the less money it will cost to remedy it and the sooner the product will be ready for production or shipment. Therefore, a good design-for-test (DFT) strategy is needed for the design, prototype and production phase of a product. . . . read more

Variation-Aware Custom IC Design Report 2011 (Solido Design Automation, Inc.)

This report covers the results of an independent worldwide custom IC design survey. The survey was executed in late 2010, with 486 IC design professionals participating. . . . read more

FPGA Design Tutorial (1-CORE Technologies)

This FPGA design tutorial covers various issues in the fields of FPGA design, simulation and synthesis. It is targeted towards both beginners and experienced FPGA designers. . . . read more

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Selecting a specific Category will generate an alphabetical listing* of ALL the entries in that Category.

* SOCcentral's Sponsors' white papers, app notes, etc. are listed first.


10 Most-Read White Papers
CDC Methodology for Fast-to-Slow Clocks
Archipelago: An Open Source FPGA with Toolflow Support
Magic of SDN in Networking
RFID: Solutions without a Barrier

Most-Read Recent News (updated daily)
IEEE Forms Two New Working Groups to Standardize Software and System-Level Energy Management and Power Modeling for SOC Devices
Huawei Selects Cypress' TrueTouch Gen5 Touchscreen Controller for Sleek New MediaPad X1 Tablet
I2C Functional Tests on Prototypes without Operating Software Accelerates Design Validation
IP Subsystems in SOCs in Americas Will Grow to $340.5M by 2017, Says Semico Research
eASIC Joins Open NAND Flash Interface (ONFI) Working Group
Synopsys' New MIPI C-PHY Verification IP Accelerates Adoption of MIPI Alliance's Physical Layer Specifications
Altera and China Mobile Research Institute Announce Joint Efforts on Next-Generation C-RAN Wireless Technologies
STMicroelectronics Develops Always-On 6-Axis Ultra-Performance Accelerometer/Gyroscope Combo
Semtech Provides Ultra-High Speed ADC and DAC for Advanced Digital Microwave Systems
Early Bird Registration Now Open for 12th International SoC Conference, Exhibit, and Workshops
STMicroelectronics to Offer Reference Implementation of Frog by Wyplay Middleware for All Its ARM Set-Top-Box SOCs
ON Semiconductor Announces High Performance SiP Solution for Precision-Sensing in Portable Medical Devices
Cavium Standardizes on Synopsys' IC Compiler for High-Performance Processor-based SOC Designs
Open-Silicon Speeds and Simplifies ASIC Development for 100G Networks
STMicroelectronics Extends Cannes and Monaco SOC Families

Suggested Tutorials, White Papers, etc.


Tutorials, White Papers, etc. abstracted since Wednesday, April 16, 2014

Archipelago: An Open Source FPGA with Toolflow Support (University of California, Electrical Engineering)

I2C Functional Test with JTAG and FPGA IP (ASSET InterTech, Inc.)

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