April 11, 2005 -- Z Circuit Automation, Inc. has unveiled ZChar, a tool for fast, automatic characterization of digital cell libraries.
"ZChar provides us with very fast turnaround time, "said Jim Thomas, vice president of product development for Spansion LLC. "It quickly generated three full corners in a weekend, including 120 flip-flops, for our advanced 90 nanometer Flash memory process. The Z Circuit software and training has been instrumental in upgrading our digital design environment to compliment our existing, state-of-the-art analog and Flash memory design capabilities."
A library will need to be characterized for changes to process models, cell layouts, spice models, voltage thresholds, or if a custom corner at a special voltage is required. Designing at the wrong environmental corner or not taking advantage of a special operating voltage, may lead to a slower, larger design that wastes power or takes much longer to close timing. In many cases, a company does not need to build a library from scratch, but instead can use ZChar to re-characterize the library to the appropriate conditions.
ZChar quickly generates accurate and complete timing/power models and incorporates unique methods for noise immunity and signal integrity to avoid design problems that otherwise might not be detected until failure analysis.
Circuit designers in library teams have the need to optimize cells or the cell architecture, which often requires many iterations of characterization for the most complex cells in the library. ZChar has a parallel-processing burst mode in which a complex cell that would normally take 4 hours to complete, can finish in 30 minutes or less. ZChar even supports generating a specific cell characteristic in minutes. In addition to taking advantage of this fast turn-around time, designers quickly browse simulation results, display waveforms, and verify circuit behavior using ZChar's unique simulator-independent graphical mode. This results in reducing optimization time from days to hours.
ZChar also provides more than simple characterization of common logic components. ZChar is a digital modeling system, with the capabilities to handle advanced logic circuits such as differential inputs and dynamic logic, critical for meeting requirements of next-generation electronic product design and advanced process technology.
Z Circuit offers additional library development and analysis tools including Library Analyzer, which provides important validation and comparison capabilities for library developers and qualification capabilities for library consumers.
Z Circuit keeps complex model generation methods up-to-date through customer requirements and tracking technology changes. As an active member of Synopsys' Tap-in and Cadence Connections programs, Z Circuit works closely with leading EDA companies to incorporate the industry's latest standard formats, such as Synopsys Liberty.
"Designers are able to develop their chips more quickly and accurately when they access up-to-date, accurate models for their technology in the Liberty format." said Karen Bartleson, director of Interoperability at Synopsys, Inc. "Z Circuit's active participation in Synopsys' TAP-in program has enabled them to leverage Liberty, one of the most successful interoperability standards in EDA."
Pricing and Availability
ZChar is now available on Sun OS and Redhat Linux operating systems. Pricing starts at $55,000 for a one-year, time-based license. ZChar creates efficient spice runs with Synopsys HSPICE, Cadence Spectre, Berkeley Spice (BSIM3 and BSIM4 models), and other simulators including most internally developed simulators.
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