May 16, 2005 -- Sigrity, Inc. today announced CoDesign Studio, a complete chip and package co-design solution for analyzing the performance of the combined power delivery system. According to the company, CoDesign Studio is the first EDA solution to simultaneously co-simulate the complete chip and entire package in an integrated design environment. It includes all package effects that impact the correct operation of the chip.

Unlike other EDA tools, the CoDesign Studio solution analyzes power integrity of the entire chip and package power delivery system. This comprehensive approach combines Sigrity's flagship SPEED2000 solution for electrical analysis of packages, with the company's XcitePI solution for complete IC power grid analysis.

Sigrity's proprietary computational techniques take into account the complete self and mutual parasitics of the chip and all electromagnetic interactions within the package. CoDesign Studio performs chip and package co-simulation of dynamic power integrity analysis to achieve fast and accurate results. The intelligent "what-if" analysis in the chip-package co-design environment provides engineers with a variety of design choices, including chip and package decoupling capacitor placement, package selection, IC floorplan placement, and IC bump and power grid configuration.

Pricing and Availability