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Sagantec Enables MathStar To Migrate Field Programmable Object Arrays to Next Technology Node  
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January 7, 2008 -- Sagantec, Inc. has enabled MathStar, Inc. to port and optimize its high-performance field programmable object arrays (FPOAs) that perform at clock rates up to 1GHz.

MathStar provides high-performance FPOAs for professional video, machine vision, test and measurement and medical imaging applications. Using Sagantec tools, Mathstar reused its 0.13-µm production-proven FPOA design and significantly shortened its new 90-nm technology implementation. This new implementation was optimized for the new process technology and successfully verified.

"Very high-performance reprogrammable arithmetic and logic functions are extremely important to our customers,” said Tim Teckman, Vice President, Engineering at MathStar. "We wanted to leverage advances in semiconductor process technology to provide higher performance, lower power and cost advantages available at the 90-nm process node. To speed implementation of technology to the 90-nm CMOS process node, we used Sagantec’s SiClone to automate the migration of our proven 0.13-µm physical design and take it off our schedule critical path. Sagantec’s tools provide a quick path to foundry independence and technology-node upgrades without the need to totally redesign circuits.”

About SiClone

SiClone performs hierarchical process migration and layout compaction of physical designs. SiClone accelerates physical implementation and design closure of custom IC design in the latest process technologies. It executes rapid process migration by carefully repositioning all layout elements and polygon edges such that the resulting layout is design rule correct and optimized for its design performance targets. SiClone reduces physical design-cycle time, lowers design costs, enables fast design closure, and improves circuit timing, power consumption and performance.

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Keywords: Sagantec, MathStar, field programmable object arrays, FPOAs, FPGAs,
578/24671 1/7/2008 3416 156
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