July 20, 2009 - Sagantec, Inc. recently announced that Monolithic System Technology, Inc. (MoSys) has deployed Sagantec's Anaconda-M solution as part of it's methodology for automating and accelerating its process-porting flow. The Anaconda-M solution was successfully used by MoSys to help migrate its high-performance interface IP designs from 65nm to 45/40-nm technology.
The Anaconda-M based solution has facilitated significant productivity gains compared with traditional design methods, and has enabled MoSys to shorten design schedules and very quickly generate multiple process implementations with limited resources. The first one of these implementations is already silicon proven.
"MoSys delivers high-performance interface IP in the most advanced process technologies. Implementing such IP with various foundries and multiple technology nodes is a significant resource and time challenge" said Ritesh Saraf, MoSys' Vice President of Silicon Engineering. "We needed a reliable solution to handle all aspects of the physical design migration quickly and efficiently while at the same time maintaining the integrity and quality of our original implementation. Anaconda-M did exactly that and has helped us to significantly shorten our porting schedules."
"We are very pleased that MoSys has chosen Sagantec as a critical component of its IP implementation-porting solution. Its cutting-edge designs, strong feature requirements and productivity goals make for a high-standard benchmark for any design automation technology in the analog/ mixed-signal space," said Coby Zelnik, Sagantec's President and CEO. "High-performance custom IPs are becoming increasingly critical components in today's IC designs. Sagantec's Anaconda-M provides easier and faster portability of such IPs and enables on-time availability for any advanced process node and across multiple fabrication sources."
About Anaconda-M
Anaconda-M is a physical design-migration and optimization tool for analog/ mixed-signal IP. It automates and accelerates the design-migration process of large custom and analog and mixed-signal silicon IP. Anaconda-M preserves the design intent, hierarchy structure and topology, as well as geometry-sensitive layout properties, such as matching and symmetry. Anaconda-M can be used from within Cadence Design System's Virtuoso custom design platform and can be driven from both schematic and layout views. Anaconda-M is used to migrate IP designs from one technology to the next or port designs across different foundry processes. It can automatically adjust and physically implement circuit properties such as devices sizes, as well as routing constraints such as widths, spacing, etc. Anaconda-M cuts significant time not only in initial re-implementation, but also in implementing ECOs, design-rule changes, EM rules, DFM rules, etc. Anaconda-M has seamless integration into the Cadence Virtuoso platform, supporting both IC 5 and IC 6 versions and maintaining Pcell and connectivity information.
Go to the Sagantec, Inc. website to find additional information.
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