August 12, 2009 -- The 2010 Design and Verification Conference (DVCon), sponsored by Accellera, is now accepting paper, panel and tutorial submissions. Presentations are highly technical in nature and reflect real life experiences in using various languages and tools.

DVCon 2010 will be held February 23-25 at the DoubleTree Hotel in San Jose, California. The premier conference for the functional design and verification of electronic systems, its focus is on the use of specialized design and verification languages.

"We are looking for papers and panels that bring to life the complexity of verification, the real challenges designers face, and the latest practical and academic solutions," stated Dr. Ambar Sarkar, DVCon 2010 Program Chair. "The 2010 conference will highlight how the latest industrial and academic innovations can be effectively deployed in real projects. Of special interest will be activities that involve close cooperation between multiple vendors and a diverse user community, as demonstrated by the various open source software offerings and industry standards."

Suggested topics include, but are not restricted to: experiences using the latest verification methodologies, system-level design and verification, mixed-signal and low power challenges, as well as experiences in verification process and resource management.

Paper and panel proposals are due September 14, 2009. Paper proposals on-line at the DVCon website. Submit panel proposals to Stan Krolikoski at stanleyk@cadence.com.