June 2, 2004 -- NEC's System Devices Research Laboratories has purchased a license for Verific Design Automation, Inc.'s HDL Component Software.
"NEC spends significant resources in advancing state-of-the-art EDA research to maintain its leadership position in SOC design," says Dr. Masao Fukuma, vice president and general manager of NEC System Devices Research Laboratories. "Using Verific's software fits right into our best-in-class strategy."
NEC enhances the capability of its C-based system-on-chip (SOC) design environment where Verific's VHDL, Verilog 2001 and other related software will act as a front-end for NEC's (SOC) design environment. NEC received source code for VHDL and Verilog parsers, analyzers, and elaborators, as well as an RTL database. The Verific software is written in platform-independent C++ that compiles on Solaris, HP-UX, Linux and Windows platforms.
"We very much liked that Verific provides us with source code," adds Dr. Katsuharu Suzuki, NEC's technical lead. "In addition, support and training so far have been excellent."
Go to the Verific Design Automation, Inc. website to find additional information.
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